Jeffery Shawn Zweizig

Array ( [id] => 4245047 [patent_doc_number] => 06144235 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Control circuit for a motor-operated switch' [patent_app_type] => 1 [patent_app_number] => 9/143916 [patent_app_country] => US [patent_app_date] => 1998-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2753 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/144/06144235.pdf [firstpage_image] =>[orig_patent_app_number] => 143916 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4412201 [patent_doc_number] => 06271694 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Monolithically integrated output stage' [patent_app_type] => 1 [patent_app_number] => 9/143235 [patent_app_country] => US [patent_app_date] => 1998-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1992 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271694.pdf [firstpage_image] =>[orig_patent_app_number] => 143235 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4424130 [patent_doc_number] => 06194950 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'High-speed CMOS multiplexer' [patent_app_type] => 1 [patent_app_number] => 9/143170 [patent_app_country] => US [patent_app_date] => 1998-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2764 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/194/06194950.pdf [firstpage_image] =>[orig_patent_app_number] => 143170 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4104173 [patent_doc_number] => 06097229 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Bus-hold circuit having low leakage when power is off' [patent_app_type] => 1 [patent_app_number] => 9/143702 [patent_app_country] => US [patent_app_date] => 1998-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1071 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/097/06097229.pdf [firstpage_image] =>[orig_patent_app_number] => 143702 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4163982 [patent_doc_number] => 06104232 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'DC output level compensation circuit' [patent_app_type] => 1 [patent_app_number] => 9/141334 [patent_app_country] => US [patent_app_date] => 1998-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4921 [patent_no_of_claims] => 69 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/104/06104232.pdf [firstpage_image] =>[orig_patent_app_number] => 141334 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4141880 [patent_doc_number] => 06121804 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'High frequency CMOS clock recovery circuit' [patent_app_type] => 1 [patent_app_number] => 9/140840 [patent_app_country] => US [patent_app_date] => 1998-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 6327 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/121/06121804.pdf [firstpage_image] =>[orig_patent_app_number] => 140840 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4192686 [patent_doc_number] => 06094075 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-25 [patent_title] => 'Current control technique' [patent_app_type] => 1 [patent_app_number] => 9/141675 [patent_app_country] => US [patent_app_date] => 1998-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6427 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/094/06094075.pdf [firstpage_image] =>[orig_patent_app_number] => 141675 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4111218 [patent_doc_number] => 06100753 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Bias stabilization circuit' [patent_app_type] => 1 [patent_app_number] => 9/137886 [patent_app_country] => US [patent_app_date] => 1998-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1871 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100753.pdf [firstpage_image] =>[orig_patent_app_number] => 137886 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4256034 [patent_doc_number] => 06137339 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'High voltage integrated CMOS driver circuit' [patent_app_type] => 1 [patent_app_number] => 9/138177 [patent_app_country] => US [patent_app_date] => 1998-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2933 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/137/06137339.pdf [firstpage_image] =>[orig_patent_app_number] => 138177 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4246266 [patent_doc_number] => 06166575 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Signal transmission circuit achieving significantly improved response time of a driven circuit, CMOS semiconductor device and circuit board therefor' [patent_app_type] => 1 [patent_app_number] => 9/137163 [patent_app_country] => US [patent_app_date] => 1998-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 25 [patent_no_of_words] => 9728 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/166/06166575.pdf [firstpage_image] =>[orig_patent_app_number] => 137163 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4211787 [patent_doc_number] => 06078202 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-20 [patent_title] => 'Semiconductor device having portions that operate at different frequencies, and method of designing the device' [patent_app_type] => 1 [patent_app_number] => 9/134518 [patent_app_country] => US [patent_app_date] => 1998-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3191 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/078/06078202.pdf [firstpage_image] =>[orig_patent_app_number] => 134518 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4241062 [patent_doc_number] => 06075400 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Cancellation of injected charge in a bus switch' [patent_app_type] => 1 [patent_app_number] => 9/133743 [patent_app_country] => US [patent_app_date] => 1998-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3569 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/075/06075400.pdf [firstpage_image] =>[orig_patent_app_number] => 133743 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4164361 [patent_doc_number] => 06107868 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Temperature, supply and process-insensitive CMOS reference structures' [patent_app_type] => 1 [patent_app_number] => 9/132374 [patent_app_country] => US [patent_app_date] => 1998-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4474 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/107/06107868.pdf [firstpage_image] =>[orig_patent_app_number] => 132374 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4164333 [patent_doc_number] => 06107866 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Band-gap type constant voltage generating device' [patent_app_type] => 1 [patent_app_number] => 9/131730 [patent_app_country] => US [patent_app_date] => 1998-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3750 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/107/06107866.pdf [firstpage_image] =>[orig_patent_app_number] => 131730 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4225242 [patent_doc_number] => 06087866 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Circuit for producing a reset signal' [patent_app_type] => 1 [patent_app_number] => 9/131810 [patent_app_country] => US [patent_app_date] => 1998-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2706 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/087/06087866.pdf [firstpage_image] =>[orig_patent_app_number] => 131810 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4191933 [patent_doc_number] => 06150867 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Integrated device for switching systems with filtered reference quantities' [patent_app_type] => 1 [patent_app_number] => 9/130694 [patent_app_country] => US [patent_app_date] => 1998-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3200 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150867.pdf [firstpage_image] =>[orig_patent_app_number] => 130694 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4179221 [patent_doc_number] => 06140862 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Semiconductor circuit device having internal power supply circuit' [patent_app_type] => 1 [patent_app_number] => 9/129387 [patent_app_country] => US [patent_app_date] => 1998-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4011 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/140/06140862.pdf [firstpage_image] =>[orig_patent_app_number] => 129387 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4111230 [patent_doc_number] => 06100754 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'V.sub.T reference voltage for extremely low power supply' [patent_app_type] => 1 [patent_app_number] => 9/128024 [patent_app_country] => US [patent_app_date] => 1998-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2958 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100754.pdf [firstpage_image] =>[orig_patent_app_number] => 128024 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4186741 [patent_doc_number] => 06037819 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'High frequency clock signal generator' [patent_app_type] => 1 [patent_app_number] => 9/126627 [patent_app_country] => US [patent_app_date] => 1998-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2663 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/037/06037819.pdf [firstpage_image] =>[orig_patent_app_number] => 126627 [rel_patent_id] =>[rel_patent_doc_number] =>)