Search

Jeffery Shawn Zweizig

Examiner (ID: 12123, Phone: (571)272-1758 , Office: P/2842 )

Most Active Art Unit
2816
Art Unit(s)
2849, 2816, 2842, 2504
Total Applications
2645
Issued Applications
2451
Pending Applications
87
Abandoned Applications
136

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3776888 [patent_doc_number] => 05850160 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-15 [patent_title] => 'Gate drive circuit for an SCR' [patent_app_type] => 1 [patent_app_number] => 8/877623 [patent_app_country] => US [patent_app_date] => 1997-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3421 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/850/05850160.pdf [firstpage_image] =>[orig_patent_app_number] => 877623 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/877623
Gate drive circuit for an SCR Jun 17, 1997 Issued
Array ( [id] => 4050410 [patent_doc_number] => 05909141 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-01 [patent_title] => 'Step-up potential supply circuit and semiconductor storage device' [patent_app_type] => 1 [patent_app_number] => 8/874351 [patent_app_country] => US [patent_app_date] => 1997-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 34 [patent_no_of_words] => 13559 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/909/05909141.pdf [firstpage_image] =>[orig_patent_app_number] => 874351 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/874351
Step-up potential supply circuit and semiconductor storage device Jun 12, 1997 Issued
Array ( [id] => 3944643 [patent_doc_number] => 05872468 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'Level detector circuit, interface and method for interpreting and processing multi-level signals' [patent_app_type] => 1 [patent_app_number] => 8/873936 [patent_app_country] => US [patent_app_date] => 1997-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5240 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/872/05872468.pdf [firstpage_image] =>[orig_patent_app_number] => 873936 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/873936
Level detector circuit, interface and method for interpreting and processing multi-level signals Jun 11, 1997 Issued
Array ( [id] => 3910938 [patent_doc_number] => 05898327 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Low-power reset signal generating circuit improved in voltage rising characteristic' [patent_app_type] => 1 [patent_app_number] => 8/872387 [patent_app_country] => US [patent_app_date] => 1997-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3623 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/898/05898327.pdf [firstpage_image] =>[orig_patent_app_number] => 872387 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/872387
Low-power reset signal generating circuit improved in voltage rising characteristic Jun 9, 1997 Issued
Array ( [id] => 4055877 [patent_doc_number] => 05869991 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-09 [patent_title] => 'Automatic runaway detector and reset circuit' [patent_app_type] => 1 [patent_app_number] => 8/870340 [patent_app_country] => US [patent_app_date] => 1997-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2141 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/869/05869991.pdf [firstpage_image] =>[orig_patent_app_number] => 870340 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/870340
Automatic runaway detector and reset circuit Jun 5, 1997 Issued
Array ( [id] => 3750255 [patent_doc_number] => 05801569 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Output driver for mixed supply voltage systems' [patent_app_type] => 1 [patent_app_number] => 8/867465 [patent_app_country] => US [patent_app_date] => 1997-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4069 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/801/05801569.pdf [firstpage_image] =>[orig_patent_app_number] => 867465 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/867465
Output driver for mixed supply voltage systems Jun 1, 1997 Issued
Array ( [id] => 3777975 [patent_doc_number] => 05774011 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-30 [patent_title] => 'Antifuse circuit using standard MOSFET devices' [patent_app_type] => 1 [patent_app_number] => 8/864254 [patent_app_country] => US [patent_app_date] => 1997-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 2553 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/774/05774011.pdf [firstpage_image] =>[orig_patent_app_number] => 864254 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/864254
Antifuse circuit using standard MOSFET devices May 27, 1997 Issued
Array ( [id] => 3876524 [patent_doc_number] => 05838184 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Equivalent variable resistor circuits' [patent_app_type] => 1 [patent_app_number] => 8/861198 [patent_app_country] => US [patent_app_date] => 1997-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7006 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838184.pdf [firstpage_image] =>[orig_patent_app_number] => 861198 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/861198
Equivalent variable resistor circuits May 20, 1997 Issued
Array ( [id] => 3882384 [patent_doc_number] => 05825217 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'Low power accelerated switching for MOS circuits' [patent_app_type] => 1 [patent_app_number] => 8/861173 [patent_app_country] => US [patent_app_date] => 1997-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 2840 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/825/05825217.pdf [firstpage_image] =>[orig_patent_app_number] => 861173 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/861173
Low power accelerated switching for MOS circuits May 20, 1997 Issued
Array ( [id] => 3898283 [patent_doc_number] => 05834963 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'Circuit configuration for parameter adjustment' [patent_app_type] => 1 [patent_app_number] => 8/858818 [patent_app_country] => US [patent_app_date] => 1997-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2118 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/834/05834963.pdf [firstpage_image] =>[orig_patent_app_number] => 858818 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/858818
Circuit configuration for parameter adjustment May 18, 1997 Issued
Array ( [id] => 3882653 [patent_doc_number] => 05825236 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'Low voltage bias circuit for generating supply-independent bias voltages currents' [patent_app_type] => 1 [patent_app_number] => 8/859798 [patent_app_country] => US [patent_app_date] => 1997-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2568 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/825/05825236.pdf [firstpage_image] =>[orig_patent_app_number] => 859798 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/859798
Low voltage bias circuit for generating supply-independent bias voltages currents May 18, 1997 Issued
Array ( [id] => 3963341 [patent_doc_number] => 05936441 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Clock pulse generator' [patent_app_type] => 1 [patent_app_number] => 8/857202 [patent_app_country] => US [patent_app_date] => 1997-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 9444 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/936/05936441.pdf [firstpage_image] =>[orig_patent_app_number] => 857202 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/857202
Clock pulse generator May 14, 1997 Issued
Array ( [id] => 3881649 [patent_doc_number] => 05764093 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Variable delay circuit' [patent_app_type] => 1 [patent_app_number] => 8/850816 [patent_app_country] => US [patent_app_date] => 1997-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2885 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/764/05764093.pdf [firstpage_image] =>[orig_patent_app_number] => 850816 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/850816
Variable delay circuit May 1, 1997 Issued
Array ( [id] => 3768745 [patent_doc_number] => 05844434 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-01 [patent_title] => 'Start-up circuit for maximum headroom CMOS devices' [patent_app_type] => 1 [patent_app_number] => 8/842344 [patent_app_country] => US [patent_app_date] => 1997-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3344 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/844/05844434.pdf [firstpage_image] =>[orig_patent_app_number] => 842344 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/842344
Start-up circuit for maximum headroom CMOS devices Apr 23, 1997 Issued
Array ( [id] => 4011487 [patent_doc_number] => 05859558 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Low voltage analog front end' [patent_app_type] => 1 [patent_app_number] => 8/827855 [patent_app_country] => US [patent_app_date] => 1997-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4477 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/859/05859558.pdf [firstpage_image] =>[orig_patent_app_number] => 827855 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/827855
Low voltage analog front end Apr 10, 1997 Issued
Array ( [id] => 4032574 [patent_doc_number] => 05883540 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'Electrostatic protection circuit of an input/output circuit of a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/826594 [patent_app_country] => US [patent_app_date] => 1997-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2698 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/883/05883540.pdf [firstpage_image] =>[orig_patent_app_number] => 826594 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/826594
Electrostatic protection circuit of an input/output circuit of a semiconductor device Apr 2, 1997 Issued
Array ( [id] => 3847413 [patent_doc_number] => 05847591 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-08 [patent_title] => 'Voltage detection circuit and internal voltage clamp circuit' [patent_app_type] => 1 [patent_app_number] => 8/829256 [patent_app_country] => US [patent_app_date] => 1997-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 4341 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/847/05847591.pdf [firstpage_image] =>[orig_patent_app_number] => 829256 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/829256
Voltage detection circuit and internal voltage clamp circuit Mar 30, 1997 Issued
Array ( [id] => 4069326 [patent_doc_number] => 05896058 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-20 [patent_title] => 'High speed totem pole FET driver circuit with differential cross conduction prevention' [patent_app_type] => 1 [patent_app_number] => 8/829004 [patent_app_country] => US [patent_app_date] => 1997-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2935 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 421 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/896/05896058.pdf [firstpage_image] =>[orig_patent_app_number] => 829004 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/829004
High speed totem pole FET driver circuit with differential cross conduction prevention Mar 30, 1997 Issued
Array ( [id] => 3859965 [patent_doc_number] => 05767724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Electronic clamping circuit' [patent_app_type] => 1 [patent_app_number] => 8/828358 [patent_app_country] => US [patent_app_date] => 1997-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3110 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/767/05767724.pdf [firstpage_image] =>[orig_patent_app_number] => 828358 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/828358
Electronic clamping circuit Mar 27, 1997 Issued
Array ( [id] => 3946853 [patent_doc_number] => 05973543 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Bias circuit for bipolar transistor' [patent_app_type] => 1 [patent_app_number] => 8/825220 [patent_app_country] => US [patent_app_date] => 1997-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 7332 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/973/05973543.pdf [firstpage_image] =>[orig_patent_app_number] => 825220 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/825220
Bias circuit for bipolar transistor Mar 26, 1997 Issued
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