
Jeffery Shawn Zweizig
Examiner (ID: 12123, Phone: (571)272-1758 , Office: P/2842 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2849, 2816, 2842, 2504 |
| Total Applications | 2645 |
| Issued Applications | 2451 |
| Pending Applications | 87 |
| Abandoned Applications | 136 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4050366
[patent_doc_number] => 05912568
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-15
[patent_title] => 'Led drive circuit'
[patent_app_type] => 1
[patent_app_number] => 8/821896
[patent_app_country] => US
[patent_app_date] => 1997-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 2570
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/912/05912568.pdf
[firstpage_image] =>[orig_patent_app_number] => 821896
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/821896 | Led drive circuit | Mar 20, 1997 | Issued |
Array
(
[id] => 4363417
[patent_doc_number] => 06218888
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-17
[patent_title] => 'Insulated gate bipolar transistor device with a current limiting circuit'
[patent_app_type] => 1
[patent_app_number] => 8/816832
[patent_app_country] => US
[patent_app_date] => 1997-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 4568
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 216
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/218/06218888.pdf
[firstpage_image] =>[orig_patent_app_number] => 816832
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/816832 | Insulated gate bipolar transistor device with a current limiting circuit | Mar 17, 1997 | Issued |
Array
(
[id] => 4071770
[patent_doc_number] => 05867052
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-02
[patent_title] => 'Off-chip driver for mixed voltage applications'
[patent_app_type] => 1
[patent_app_number] => 8/812623
[patent_app_country] => US
[patent_app_date] => 1997-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 7415
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/867/05867052.pdf
[firstpage_image] =>[orig_patent_app_number] => 812623
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/812623 | Off-chip driver for mixed voltage applications | Mar 6, 1997 | Issued |
Array
(
[id] => 4050569
[patent_doc_number] => 05912580
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-15
[patent_title] => 'Voltage reference circuit'
[patent_app_type] => 1
[patent_app_number] => 8/808906
[patent_app_country] => US
[patent_app_date] => 1997-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 6335
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/912/05912580.pdf
[firstpage_image] =>[orig_patent_app_number] => 808906
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/808906 | Voltage reference circuit | Mar 2, 1997 | Issued |
Array
(
[id] => 3814588
[patent_doc_number] => 05831460
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-03
[patent_title] => 'Power-on reset circuit with separate power-up and brown-out trigger levels'
[patent_app_type] => 1
[patent_app_number] => 8/806998
[patent_app_country] => US
[patent_app_date] => 1997-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 3211
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/831/05831460.pdf
[firstpage_image] =>[orig_patent_app_number] => 806998
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/806998 | Power-on reset circuit with separate power-up and brown-out trigger levels | Feb 25, 1997 | Issued |
Array
(
[id] => 4225313
[patent_doc_number] => 06087871
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-11
[patent_title] => 'Pulse generating circuits using drift step recovery devices'
[patent_app_type] => 1
[patent_app_number] => 8/806645
[patent_app_country] => US
[patent_app_date] => 1997-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 4272
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/087/06087871.pdf
[firstpage_image] =>[orig_patent_app_number] => 806645
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/806645 | Pulse generating circuits using drift step recovery devices | Feb 25, 1997 | Issued |
Array
(
[id] => 4011557
[patent_doc_number] => 05859563
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-12
[patent_title] => 'Low-noise low-impedance voltage reference'
[patent_app_type] => 1
[patent_app_number] => 8/800913
[patent_app_country] => US
[patent_app_date] => 1997-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 4
[patent_no_of_words] => 936
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/859/05859563.pdf
[firstpage_image] =>[orig_patent_app_number] => 800913
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/800913 | Low-noise low-impedance voltage reference | Feb 12, 1997 | Issued |
Array
(
[id] => 3782710
[patent_doc_number] => 05757223
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-26
[patent_title] => 'Integrated negative D-C bias circuit'
[patent_app_type] => 1
[patent_app_number] => 8/799984
[patent_app_country] => US
[patent_app_date] => 1997-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6499
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/757/05757223.pdf
[firstpage_image] =>[orig_patent_app_number] => 799984
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/799984 | Integrated negative D-C bias circuit | Feb 11, 1997 | Issued |
Array
(
[id] => 4192960
[patent_doc_number] => 06094093
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-25
[patent_title] => 'Low-voltage input buffer'
[patent_app_type] => 1
[patent_app_number] => 8/795195
[patent_app_country] => US
[patent_app_date] => 1997-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 4177
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/094/06094093.pdf
[firstpage_image] =>[orig_patent_app_number] => 795195
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/795195 | Low-voltage input buffer | Feb 3, 1997 | Issued |
Array
(
[id] => 3934743
[patent_doc_number] => 05877646
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-02
[patent_title] => 'Method for the turn-on regulation of an IGBT and apparatus for carrying out the method'
[patent_app_type] => 1
[patent_app_number] => 8/792232
[patent_app_country] => US
[patent_app_date] => 1997-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 3007
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/877/05877646.pdf
[firstpage_image] =>[orig_patent_app_number] => 792232
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/792232 | Method for the turn-on regulation of an IGBT and apparatus for carrying out the method | Jan 30, 1997 | Issued |
Array
(
[id] => 3791333
[patent_doc_number] => 05821788
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-13
[patent_title] => 'Zero consumption power-on-reset'
[patent_app_type] => 1
[patent_app_number] => 8/790832
[patent_app_country] => US
[patent_app_date] => 1997-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 1603
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/821/05821788.pdf
[firstpage_image] =>[orig_patent_app_number] => 790832
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/790832 | Zero consumption power-on-reset | Jan 29, 1997 | Issued |
Array
(
[id] => 3848557
[patent_doc_number] => 05708379
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-01-13
[patent_title] => 'Electronically programmable output impedance circuit'
[patent_app_type] => 1
[patent_app_number] => 8/790233
[patent_app_country] => US
[patent_app_date] => 1997-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1499
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 462
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/708/05708379.pdf
[firstpage_image] =>[orig_patent_app_number] => 790233
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/790233 | Electronically programmable output impedance circuit | Jan 27, 1997 | Issued |
Array
(
[id] => 3814562
[patent_doc_number] => 05831458
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-03
[patent_title] => 'Output circuit having BiNMOS inverters'
[patent_app_type] => 1
[patent_app_number] => 8/788643
[patent_app_country] => US
[patent_app_date] => 1997-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 16
[patent_no_of_words] => 3207
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 261
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/831/05831458.pdf
[firstpage_image] =>[orig_patent_app_number] => 788643
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/788643 | Output circuit having BiNMOS inverters | Jan 26, 1997 | Issued |
Array
(
[id] => 3750446
[patent_doc_number] => 05801581
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-01
[patent_title] => 'Comparison detection circuit'
[patent_app_type] => 1
[patent_app_number] => 8/786335
[patent_app_country] => US
[patent_app_date] => 1997-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5571
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/801/05801581.pdf
[firstpage_image] =>[orig_patent_app_number] => 786335
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/786335 | Comparison detection circuit | Jan 22, 1997 | Issued |
Array
(
[id] => 3791584
[patent_doc_number] => 05821806
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-13
[patent_title] => 'Boost regulator'
[patent_app_type] => 1
[patent_app_number] => 8/787494
[patent_app_country] => US
[patent_app_date] => 1997-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2765
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/821/05821806.pdf
[firstpage_image] =>[orig_patent_app_number] => 787494
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/787494 | Boost regulator | Jan 20, 1997 | Issued |
Array
(
[id] => 3791262
[patent_doc_number] => 05821783
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-13
[patent_title] => 'Buffer circuits with changeable drive characteristic'
[patent_app_type] => 1
[patent_app_number] => 8/778695
[patent_app_country] => US
[patent_app_date] => 1997-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 22
[patent_no_of_words] => 13687
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/821/05821783.pdf
[firstpage_image] =>[orig_patent_app_number] => 778695
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/778695 | Buffer circuits with changeable drive characteristic | Jan 2, 1997 | Issued |
Array
(
[id] => 3768830
[patent_doc_number] => 05844440
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-01
[patent_title] => 'Circuit for inrush and current limiting'
[patent_app_type] => 1
[patent_app_number] => 8/771439
[patent_app_country] => US
[patent_app_date] => 1996-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3864
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/844/05844440.pdf
[firstpage_image] =>[orig_patent_app_number] => 771439
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/771439 | Circuit for inrush and current limiting | Dec 19, 1996 | Issued |
Array
(
[id] => 3928431
[patent_doc_number] => 05914626
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-22
[patent_title] => 'Voltage clamping circuit for semiconductor devices'
[patent_app_type] => 1
[patent_app_number] => 8/770627
[patent_app_country] => US
[patent_app_date] => 1996-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1953
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/914/05914626.pdf
[firstpage_image] =>[orig_patent_app_number] => 770627
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/770627 | Voltage clamping circuit for semiconductor devices | Dec 18, 1996 | Issued |
Array
(
[id] => 3750407
[patent_doc_number] => 05801578
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-01
[patent_title] => 'Charge pump circuit with source-sink current steering'
[patent_app_type] => 1
[patent_app_number] => 8/766095
[patent_app_country] => US
[patent_app_date] => 1996-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4023
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 303
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/801/05801578.pdf
[firstpage_image] =>[orig_patent_app_number] => 766095
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/766095 | Charge pump circuit with source-sink current steering | Dec 15, 1996 | Issued |
Array
(
[id] => 3750390
[patent_doc_number] => 05801577
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-01
[patent_title] => 'High voltage generator'
[patent_app_type] => 1
[patent_app_number] => 8/762677
[patent_app_country] => US
[patent_app_date] => 1996-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 5247
[patent_no_of_claims] => 43
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/801/05801577.pdf
[firstpage_image] =>[orig_patent_app_number] => 762677
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/762677 | High voltage generator | Dec 10, 1996 | Issued |