
Jeffery Shawn Zweizig
Examiner (ID: 3642, Phone: (571)272-1758 , Office: P/2842 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2816, 2849, 2842, 2504 |
| Total Applications | 2640 |
| Issued Applications | 2460 |
| Pending Applications | 67 |
| Abandoned Applications | 136 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3767521
[patent_doc_number] => 05852382
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-22
[patent_title] => 'Three-state CMOS output buffer circuit'
[patent_app_type] => 1
[patent_app_number] => 8/623317
[patent_app_country] => US
[patent_app_date] => 1996-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2656
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/852/05852382.pdf
[firstpage_image] =>[orig_patent_app_number] => 623317
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/623317 | Three-state CMOS output buffer circuit | Mar 25, 1996 | Issued |
Array
(
[id] => 3661167
[patent_doc_number] => 05623223
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-22
[patent_title] => 'Glitchless clock switching circuit'
[patent_app_type] => 1
[patent_app_number] => 8/622635
[patent_app_country] => US
[patent_app_date] => 1996-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3940
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 325
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/623/05623223.pdf
[firstpage_image] =>[orig_patent_app_number] => 622635
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/622635 | Glitchless clock switching circuit | Mar 25, 1996 | Issued |
Array
(
[id] => 3837303
[patent_doc_number] => 05760635
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-02
[patent_title] => 'Apparatus for switching channels within a multi-channel read/write preamplifier circuit'
[patent_app_type] => 1
[patent_app_number] => 8/622558
[patent_app_country] => US
[patent_app_date] => 1996-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4185
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 22
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/760/05760635.pdf
[firstpage_image] =>[orig_patent_app_number] => 622558
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/622558 | Apparatus for switching channels within a multi-channel read/write preamplifier circuit | Mar 24, 1996 | Issued |
Array
(
[id] => 3693823
[patent_doc_number] => 05691663
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-25
[patent_title] => 'Single-ended supply preamplifier with high power supply rejection ratio'
[patent_app_type] => 1
[patent_app_number] => 8/621653
[patent_app_country] => US
[patent_app_date] => 1996-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2913
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 217
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/691/05691663.pdf
[firstpage_image] =>[orig_patent_app_number] => 621653
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/621653 | Single-ended supply preamplifier with high power supply rejection ratio | Mar 24, 1996 | Issued |
Array
(
[id] => 3634814
[patent_doc_number] => 05686854
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-11
[patent_title] => 'Isolated driver circuit for high frequency solid-state switches'
[patent_app_type] => 1
[patent_app_number] => 8/615409
[patent_app_country] => US
[patent_app_date] => 1996-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2389
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 652
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/686/05686854.pdf
[firstpage_image] =>[orig_patent_app_number] => 615409
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/615409 | Isolated driver circuit for high frequency solid-state switches | Mar 13, 1996 | Issued |
Array
(
[id] => 3608233
[patent_doc_number] => 05578956
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-26
[patent_title] => 'Circuit for limiting the maximum current value supplied to a load by a power MOS at power-up'
[patent_app_type] => 1
[patent_app_number] => 8/615729
[patent_app_country] => US
[patent_app_date] => 1996-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 3176
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/578/05578956.pdf
[firstpage_image] =>[orig_patent_app_number] => 615729
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/615729 | Circuit for limiting the maximum current value supplied to a load by a power MOS at power-up | Mar 13, 1996 | Issued |
Array
(
[id] => 3823309
[patent_doc_number] => 05789968
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-04
[patent_title] => 'Controllable semiconductor switch'
[patent_app_type] => 1
[patent_app_number] => 8/615736
[patent_app_country] => US
[patent_app_date] => 1996-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5218
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/789/05789968.pdf
[firstpage_image] =>[orig_patent_app_number] => 615736
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/615736 | Controllable semiconductor switch | Mar 12, 1996 | Issued |
Array
(
[id] => 3782645
[patent_doc_number] => 05757218
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-26
[patent_title] => 'Clock signal duty cycle correction circuit and method'
[patent_app_type] => 1
[patent_app_number] => 8/614458
[patent_app_country] => US
[patent_app_date] => 1996-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3931
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/757/05757218.pdf
[firstpage_image] =>[orig_patent_app_number] => 614458
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/614458 | Clock signal duty cycle correction circuit and method | Mar 11, 1996 | Issued |
Array
(
[id] => 3737637
[patent_doc_number] => 05694071
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-02
[patent_title] => 'Electronic device comprising means for compensating an undesired capacitance'
[patent_app_type] => 1
[patent_app_number] => 8/615558
[patent_app_country] => US
[patent_app_date] => 1996-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 3777
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/694/05694071.pdf
[firstpage_image] =>[orig_patent_app_number] => 615558
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/615558 | Electronic device comprising means for compensating an undesired capacitance | Mar 11, 1996 | Issued |
Array
(
[id] => 3734568
[patent_doc_number] => 05703513
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-30
[patent_title] => 'Master-slave bistable latch with clock input control'
[patent_app_type] => 1
[patent_app_number] => 8/608051
[patent_app_country] => US
[patent_app_date] => 1996-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 71
[patent_no_of_words] => 31836
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/703/05703513.pdf
[firstpage_image] =>[orig_patent_app_number] => 608051
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/608051 | Master-slave bistable latch with clock input control | Feb 27, 1996 | Issued |
| 08/605588 | SUBSTRATE BIASING CIRCUIT HAVING CONTROLLABLE RING OSCILLATOR | Feb 21, 1996 | Abandoned |
Array
(
[id] => 3634885
[patent_doc_number] => 05686859
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-11
[patent_title] => 'Semiconductor switch including a pre-driver with a capacitively isolated power supply'
[patent_app_type] => 1
[patent_app_number] => 8/597128
[patent_app_country] => US
[patent_app_date] => 1996-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8728
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/686/05686859.pdf
[firstpage_image] =>[orig_patent_app_number] => 597128
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/597128 | Semiconductor switch including a pre-driver with a capacitively isolated power supply | Feb 5, 1996 | Issued |
Array
(
[id] => 3634855
[patent_doc_number] => 05686857
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-11
[patent_title] => 'Zero-crossing triac and method'
[patent_app_type] => 1
[patent_app_number] => 8/596036
[patent_app_country] => US
[patent_app_date] => 1996-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 4265
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/686/05686857.pdf
[firstpage_image] =>[orig_patent_app_number] => 596036
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/596036 | Zero-crossing triac and method | Feb 5, 1996 | Issued |
Array
(
[id] => 3775588
[patent_doc_number] => 05734277
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-31
[patent_title] => 'Output circuit and method for suppressing switching noise therein'
[patent_app_type] => 1
[patent_app_number] => 8/595436
[patent_app_country] => US
[patent_app_date] => 1996-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 4235
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/734/05734277.pdf
[firstpage_image] =>[orig_patent_app_number] => 595436
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/595436 | Output circuit and method for suppressing switching noise therein | Feb 4, 1996 | Issued |
Array
(
[id] => 3762085
[patent_doc_number] => 05721509
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-02-24
[patent_title] => 'Charge pump having reduced threshold voltage losses'
[patent_app_type] => 1
[patent_app_number] => 8/596817
[patent_app_country] => US
[patent_app_date] => 1996-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 2435
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/721/05721509.pdf
[firstpage_image] =>[orig_patent_app_number] => 596817
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/596817 | Charge pump having reduced threshold voltage losses | Feb 4, 1996 | Issued |
| 08/593126 | AMPLIFIER-LESS LOW POWER SWITCHED-CAPACITOR TECHNIQUES | Jan 31, 1996 | Abandoned |
Array
(
[id] => 3694333
[patent_doc_number] => 05663671
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-02
[patent_title] => 'Electronic circuit including operational amplifier and clamping circuit'
[patent_app_type] => 1
[patent_app_number] => 8/595564
[patent_app_country] => US
[patent_app_date] => 1996-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3110
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/663/05663671.pdf
[firstpage_image] =>[orig_patent_app_number] => 595564
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/595564 | Electronic circuit including operational amplifier and clamping circuit | Jan 31, 1996 | Issued |
| 08/594425 | RESET CHARGE COMPENSATION CIRCUIT | Jan 30, 1996 | Abandoned |
Array
(
[id] => 3775783
[patent_doc_number] => 05734288
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-31
[patent_title] => 'Apparatus for and method of autozeroing the output of a charge-to-voltage converter'
[patent_app_type] => 1
[patent_app_number] => 8/594426
[patent_app_country] => US
[patent_app_date] => 1996-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 3154
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/734/05734288.pdf
[firstpage_image] =>[orig_patent_app_number] => 594426
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/594426 | Apparatus for and method of autozeroing the output of a charge-to-voltage converter | Jan 30, 1996 | Issued |
Array
(
[id] => 3822655
[patent_doc_number] => 05770967
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-23
[patent_title] => 'Device and method for controlling a power switch'
[patent_app_type] => 1
[patent_app_number] => 8/594707
[patent_app_country] => US
[patent_app_date] => 1996-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2116
[patent_no_of_claims] => 20
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/770/05770967.pdf
[firstpage_image] =>[orig_patent_app_number] => 594707
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/594707 | Device and method for controlling a power switch | Jan 30, 1996 | Issued |