Jeffery Shawn Zweizig

Array ( [id] => 3814548 [patent_doc_number] => 05831457 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'Input buffer circuit immune to common mode power supply fluctuations' [patent_app_type] => 1 [patent_app_number] => 8/477283 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 2145 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/831/05831457.pdf [firstpage_image] =>[orig_patent_app_number] => 477283 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3666881 [patent_doc_number] => 05656965 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Turn-off circuitry for a high-speed switching regulator drive circuit' [patent_app_type] => 1 [patent_app_number] => 8/488042 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2751 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/656/05656965.pdf [firstpage_image] =>[orig_patent_app_number] => 488042 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3670212 [patent_doc_number] => 05668493 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-16 [patent_title] => 'Circuits and methods for increasing switch turn-off speed in high-speed switching regulator drive circuits' [patent_app_type] => 1 [patent_app_number] => 8/488071 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2892 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/668/05668493.pdf [firstpage_image] =>[orig_patent_app_number] => 488071 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3884854 [patent_doc_number] => 05748014 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-05 [patent_title] => 'Edge detector' [patent_app_type] => 1 [patent_app_number] => 8/475444 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4847 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/748/05748014.pdf [firstpage_image] =>[orig_patent_app_number] => 475444 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3654387 [patent_doc_number] => 05640122 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-17 [patent_title] => 'Circuit for providing a bias voltage compensated for p-channel transistor variations' [patent_app_type] => 1 [patent_app_number] => 8/464551 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 8117 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/640/05640122.pdf [firstpage_image] =>[orig_patent_app_number] => 464551 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3653288 [patent_doc_number] => 05638013 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-10 [patent_title] => 'Charge redistribution circuit and method' [patent_app_type] => 1 [patent_app_number] => 8/458654 [patent_app_country] => US [patent_app_date] => 1995-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 10283 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/638/05638013.pdf [firstpage_image] =>[orig_patent_app_number] => 458654 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3670104 [patent_doc_number] => 05598123 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-28 [patent_title] => 'Filter arrangement for suppressing an AC voltage superposed on a DC voltage present across poles of a DC voltage source' [patent_app_type] => 1 [patent_app_number] => 8/457399 [patent_app_country] => US [patent_app_date] => 1995-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2926 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/598/05598123.pdf [firstpage_image] =>[orig_patent_app_number] => 457399 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3695481 [patent_doc_number] => 05604458 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-18 [patent_title] => 'Scaler circuit' [patent_app_type] => 1 [patent_app_number] => 8/457445 [patent_app_country] => US [patent_app_date] => 1995-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1691 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 843 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/604/05604458.pdf [firstpage_image] =>[orig_patent_app_number] => 457445 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3666808 [patent_doc_number] => 05656960 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Controlled slope output buffer' [patent_app_type] => 1 [patent_app_number] => 8/449477 [patent_app_country] => US [patent_app_date] => 1995-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5110 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 353 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/656/05656960.pdf [firstpage_image] =>[orig_patent_app_number] => 449477 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3663332 [patent_doc_number] => 05623367 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-22 [patent_title] => 'Eyeguard with automatic diaphragm' [patent_app_type] => 1 [patent_app_number] => 8/445429 [patent_app_country] => US [patent_app_date] => 1995-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5381 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 372 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/623/05623367.pdf [firstpage_image] =>[orig_patent_app_number] => 445429 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3611276 [patent_doc_number] => 05579156 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-26 [patent_title] => 'Photomicroscope with a video camera and an exposure time control for a still camera' [patent_app_type] => 1 [patent_app_number] => 8/444342 [patent_app_country] => US [patent_app_date] => 1995-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3848 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/579/05579156.pdf [firstpage_image] =>[orig_patent_app_number] => 444342 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3543158 [patent_doc_number] => 05557468 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-17 [patent_title] => 'Chromatic dispersion compensation device' [patent_app_type] => 1 [patent_app_number] => 8/442367 [patent_app_country] => US [patent_app_date] => 1995-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 3119 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/557/05557468.pdf [firstpage_image] =>[orig_patent_app_number] => 442367 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3525816 [patent_doc_number] => 05530393 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-25 [patent_title] => 'Low power analog absolute differencing circuit and architecture' [patent_app_type] => 1 [patent_app_number] => 8/442352 [patent_app_country] => US [patent_app_date] => 1995-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5978 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/530/05530393.pdf [firstpage_image] =>[orig_patent_app_number] => 442352 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3693614 [patent_doc_number] => 05644265 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Off-chip driver for mixed voltage applications' [patent_app_type] => 1 [patent_app_number] => 8/431882 [patent_app_country] => US [patent_app_date] => 1995-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7415 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644265.pdf [firstpage_image] =>[orig_patent_app_number] => 431882 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4205171 [patent_doc_number] => 06014049 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-11 [patent_title] => 'Reduced RFI power pulse modulator' [patent_app_type] => 1 [patent_app_number] => 8/431001 [patent_app_country] => US [patent_app_date] => 1995-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2197 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/014/06014049.pdf [firstpage_image] =>[orig_patent_app_number] => 431001 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3617957 [patent_doc_number] => 05534803 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-09 [patent_title] => 'Process insensitive off-chip driver' [patent_app_type] => 1 [patent_app_number] => 8/420947 [patent_app_country] => US [patent_app_date] => 1995-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3925 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/534/05534803.pdf [firstpage_image] =>[orig_patent_app_number] => 420947 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3512736 [patent_doc_number] => 05570057 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-29 [patent_title] => 'Three-terminal insulated-gate power electronic device with a variable-slope saturated output characterisitic depending in a discontinuous way on the output current' [patent_app_type] => 1 [patent_app_number] => 8/420756 [patent_app_country] => US [patent_app_date] => 1995-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2816 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/570/05570057.pdf [firstpage_image] =>[orig_patent_app_number] => 420756 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3664645 [patent_doc_number] => 05592117 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-07 [patent_title] => 'Integrated MOSgated power semiconductor device with high negative clamp voltage and fail safe operation' [patent_app_type] => 1 [patent_app_number] => 8/420194 [patent_app_country] => US [patent_app_date] => 1995-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 2730 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/592/05592117.pdf [firstpage_image] =>[orig_patent_app_number] => 420194 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3560613 [patent_doc_number] => 05543740 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-06 [patent_title] => 'Integrated half-bridge driver circuit' [patent_app_type] => 1 [patent_app_number] => 8/419490 [patent_app_country] => US [patent_app_date] => 1995-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2886 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/543/05543740.pdf [firstpage_image] =>[orig_patent_app_number] => 419490 [rel_patent_id] =>[rel_patent_doc_number] =>)