
Jeffery Shawn Zweizig
Examiner (ID: 3642, Phone: (571)272-1758 , Office: P/2842 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2816, 2849, 2842, 2504 |
| Total Applications | 2640 |
| Issued Applications | 2460 |
| Pending Applications | 67 |
| Abandoned Applications | 136 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3558754
[patent_doc_number] => 05519344
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-21
[patent_title] => 'Fast propagation technique in CMOS integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 8/269451
[patent_app_country] => US
[patent_app_date] => 1994-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 5598
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/519/05519344.pdf
[firstpage_image] =>[orig_patent_app_number] => 269451
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/269451 | Fast propagation technique in CMOS integrated circuits | Jun 29, 1994 | Issued |
Array
(
[id] => 3467536
[patent_doc_number] => 05469110
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-21
[patent_title] => 'Charge pumping circuit using non-overlapping clock control'
[patent_app_type] => 1
[patent_app_number] => 8/265748
[patent_app_country] => US
[patent_app_date] => 1994-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 1303
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 232
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/469/05469110.pdf
[firstpage_image] =>[orig_patent_app_number] => 265748
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/265748 | Charge pumping circuit using non-overlapping clock control | Jun 26, 1994 | Issued |
Array
(
[id] => 3523119
[patent_doc_number] => 05506539
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-09
[patent_title] => 'IGFET power semiconductor circuit with GAE control and fault detection circuits'
[patent_app_type] => 1
[patent_app_number] => 8/263701
[patent_app_country] => US
[patent_app_date] => 1994-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 5239
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 210
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/506/05506539.pdf
[firstpage_image] =>[orig_patent_app_number] => 263701
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/263701 | IGFET power semiconductor circuit with GAE control and fault detection circuits | Jun 21, 1994 | Issued |
Array
(
[id] => 3448171
[patent_doc_number] => 05467036
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-14
[patent_title] => 'Integrated circuit device for driving elements and light emitting device'
[patent_app_type] => 1
[patent_app_number] => 8/263529
[patent_app_country] => US
[patent_app_date] => 1994-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 4833
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/467/05467036.pdf
[firstpage_image] =>[orig_patent_app_number] => 263529
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/263529 | Integrated circuit device for driving elements and light emitting device | Jun 21, 1994 | Issued |
Array
(
[id] => 3526738
[patent_doc_number] => 05489867
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-06
[patent_title] => 'Display data driving integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 8/262875
[patent_app_country] => US
[patent_app_date] => 1994-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 5175
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/489/05489867.pdf
[firstpage_image] =>[orig_patent_app_number] => 262875
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/262875 | Display data driving integrated circuit | Jun 20, 1994 | Issued |
Array
(
[id] => 3617985
[patent_doc_number] => 05565806
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-15
[patent_title] => 'Input/output interface circuit for digital and/or analog signals'
[patent_app_type] => 1
[patent_app_number] => 8/262590
[patent_app_country] => US
[patent_app_date] => 1994-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2115
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/565/05565806.pdf
[firstpage_image] =>[orig_patent_app_number] => 262590
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/262590 | Input/output interface circuit for digital and/or analog signals | Jun 19, 1994 | Issued |
Array
(
[id] => 3572294
[patent_doc_number] => 05485117
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-16
[patent_title] => 'Power circuit and semiconductor device including the same'
[patent_app_type] => 1
[patent_app_number] => 8/262373
[patent_app_country] => US
[patent_app_date] => 1994-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 3384
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 288
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/485/05485117.pdf
[firstpage_image] =>[orig_patent_app_number] => 262373
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/262373 | Power circuit and semiconductor device including the same | Jun 19, 1994 | Issued |
Array
(
[id] => 3122530
[patent_doc_number] => 05450030
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-09-12
[patent_title] => 'Circuit for adjusting a circuit parameter of a circuit'
[patent_app_type] => 1
[patent_app_number] => 8/258103
[patent_app_country] => US
[patent_app_date] => 1994-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4735
[patent_no_of_claims] => 48
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 370
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/450/05450030.pdf
[firstpage_image] =>[orig_patent_app_number] => 258103
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/258103 | Circuit for adjusting a circuit parameter of a circuit | Jun 9, 1994 | Issued |
Array
(
[id] => 3423761
[patent_doc_number] => 05434530
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-07-18
[patent_title] => 'Superconducting semiconducting cross-bar circuit'
[patent_app_type] => 1
[patent_app_number] => 8/255836
[patent_app_country] => US
[patent_app_date] => 1994-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 5764
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/434/05434530.pdf
[firstpage_image] =>[orig_patent_app_number] => 255836
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/255836 | Superconducting semiconducting cross-bar circuit | Jun 6, 1994 | Issued |
| 08/255144 | OFF CHIP DRIVER HAVING SLEW RATE CONTROL AND DIFFERENTIAL VOLTAGE PROTECTION CIRCUITRY | Jun 6, 1994 | Abandoned |
Array
(
[id] => 3454390
[patent_doc_number] => 05424662
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-06-13
[patent_title] => 'Differential current mode driver circuit with low common-mode noise'
[patent_app_type] => 1
[patent_app_number] => 8/250968
[patent_app_country] => US
[patent_app_date] => 1994-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3414
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/424/05424662.pdf
[firstpage_image] =>[orig_patent_app_number] => 250968
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/250968 | Differential current mode driver circuit with low common-mode noise | May 30, 1994 | Issued |
Array
(
[id] => 3467307
[patent_doc_number] => 05469094
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-21
[patent_title] => 'Power transistor driver stage with optimally reduced turn-off delay'
[patent_app_type] => 1
[patent_app_number] => 8/251699
[patent_app_country] => US
[patent_app_date] => 1994-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 2514
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/469/05469094.pdf
[firstpage_image] =>[orig_patent_app_number] => 251699
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/251699 | Power transistor driver stage with optimally reduced turn-off delay | May 30, 1994 | Issued |
| 08/248674 | SUBSTRATE BIASING CIRCUIT HAVING CONTROLLABLE RING OSCILLATOR | May 24, 1994 | Abandoned |
Array
(
[id] => 3526766
[patent_doc_number] => 05489869
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-06
[patent_title] => 'Antenna control unit attenuator and Bi-phase modulator'
[patent_app_type] => 1
[patent_app_number] => 8/245187
[patent_app_country] => US
[patent_app_date] => 1994-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2235
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/489/05489869.pdf
[firstpage_image] =>[orig_patent_app_number] => 245187
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/245187 | Antenna control unit attenuator and Bi-phase modulator | May 16, 1994 | Issued |
Array
(
[id] => 3130337
[patent_doc_number] => 05436585
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-07-25
[patent_title] => 'BiNMOS driver circuit with integrated voltage supply conversion'
[patent_app_type] => 1
[patent_app_number] => 8/242790
[patent_app_country] => US
[patent_app_date] => 1994-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2566
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 369
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/436/05436585.pdf
[firstpage_image] =>[orig_patent_app_number] => 242790
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/242790 | BiNMOS driver circuit with integrated voltage supply conversion | May 15, 1994 | Issued |
Array
(
[id] => 3535852
[patent_doc_number] => 05583464
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-10
[patent_title] => 'Resistor circuit for integrated circuit chip using insulated field effect transistors'
[patent_app_type] => 1
[patent_app_number] => 8/242504
[patent_app_country] => US
[patent_app_date] => 1994-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5653
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/583/05583464.pdf
[firstpage_image] =>[orig_patent_app_number] => 242504
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/242504 | Resistor circuit for integrated circuit chip using insulated field effect transistors | May 12, 1994 | Issued |
Array
(
[id] => 3572176
[patent_doc_number] => 05485109
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-16
[patent_title] => 'Error signal generation circuit for low dropout regulators'
[patent_app_type] => 1
[patent_app_number] => 8/241505
[patent_app_country] => US
[patent_app_date] => 1994-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4043
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 195
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/485/05485109.pdf
[firstpage_image] =>[orig_patent_app_number] => 241505
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/241505 | Error signal generation circuit for low dropout regulators | May 11, 1994 | Issued |
Array
(
[id] => 3941120
[patent_doc_number] => 05939907
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-17
[patent_title] => 'Low power, high speed driving circuit for driving switching elements'
[patent_app_type] => 1
[patent_app_number] => 8/241875
[patent_app_country] => US
[patent_app_date] => 1994-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 5464
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/939/05939907.pdf
[firstpage_image] =>[orig_patent_app_number] => 241875
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/241875 | Low power, high speed driving circuit for driving switching elements | May 11, 1994 | Issued |
Array
(
[id] => 3421357
[patent_doc_number] => 05453710
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-09-26
[patent_title] => 'Quasi-passive switched-capacitor (SC) delay line'
[patent_app_type] => 1
[patent_app_number] => 8/240379
[patent_app_country] => US
[patent_app_date] => 1994-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2524
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/453/05453710.pdf
[firstpage_image] =>[orig_patent_app_number] => 240379
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/240379 | Quasi-passive switched-capacitor (SC) delay line | May 9, 1994 | Issued |
| 08/240091 | INPUT BUFFER CIRCUIT | May 8, 1994 | Abandoned |