
Jeffery Shawn Zweizig
Examiner (ID: 12123, Phone: (571)272-1758 , Office: P/2842 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2849, 2816, 2842, 2504 |
| Total Applications | 2645 |
| Issued Applications | 2451 |
| Pending Applications | 87 |
| Abandoned Applications | 136 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3539427
[patent_doc_number] => 05557227
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-17
[patent_title] => 'Economical generation of exponential and pseudo-exponential decay functions in digital hardware'
[patent_app_type] => 1
[patent_app_number] => 8/224442
[patent_app_country] => US
[patent_app_date] => 1994-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 3913
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/557/05557227.pdf
[firstpage_image] =>[orig_patent_app_number] => 224442
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/224442 | Economical generation of exponential and pseudo-exponential decay functions in digital hardware | Apr 6, 1994 | Issued |
Array
(
[id] => 3423669
[patent_doc_number] => 05434523
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-07-18
[patent_title] => 'Circuit and method for adjusting a pulse width of a signal'
[patent_app_type] => 1
[patent_app_number] => 8/223186
[patent_app_country] => US
[patent_app_date] => 1994-04-05
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 223186
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/223186 | Circuit and method for adjusting a pulse width of a signal | Apr 4, 1994 | Issued |
Array
(
[id] => 3492880
[patent_doc_number] => 05475334
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-12
[patent_title] => 'Output driver circuit with free-switchable output'
[patent_app_type] => 1
[patent_app_number] => 8/218497
[patent_app_country] => US
[patent_app_date] => 1994-03-28
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/218497 | Output driver circuit with free-switchable output | Mar 27, 1994 | Issued |
Array
(
[id] => 3433317
[patent_doc_number] => 05455530
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-03
[patent_title] => 'Duty cycle control circuit and associated method'
[patent_app_type] => 1
[patent_app_number] => 8/208946
[patent_app_country] => US
[patent_app_date] => 1994-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[firstpage_image] =>[orig_patent_app_number] => 208946
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/208946 | Duty cycle control circuit and associated method | Mar 8, 1994 | Issued |
Array
(
[id] => 3418229
[patent_doc_number] => 05444404
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-22
[patent_title] => 'Scan flip-flop with power saving feature'
[patent_app_type] => 1
[patent_app_number] => 8/205921
[patent_app_country] => US
[patent_app_date] => 1994-03-03
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[firstpage_image] =>[orig_patent_app_number] => 205921
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/205921 | Scan flip-flop with power saving feature | Mar 2, 1994 | Issued |
Array
(
[id] => 3494944
[patent_doc_number] => 05471165
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-28
[patent_title] => 'Signal processing circuit and a method of delaying a binary periodic input signal'
[patent_app_type] => 1
[patent_app_number] => 8/201851
[patent_app_country] => US
[patent_app_date] => 1994-02-24
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[pdf_file] => patents/05/471/05471165.pdf
[firstpage_image] =>[orig_patent_app_number] => 201851
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/201851 | Signal processing circuit and a method of delaying a binary periodic input signal | Feb 23, 1994 | Issued |
Array
(
[id] => 3467429
[patent_doc_number] => 05469102
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-21
[patent_title] => 'Capacitive coupled summing circuit with signed output'
[patent_app_type] => 1
[patent_app_number] => 8/196837
[patent_app_country] => US
[patent_app_date] => 1994-02-15
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[firstpage_image] =>[orig_patent_app_number] => 196837
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/196837 | Capacitive coupled summing circuit with signed output | Feb 14, 1994 | Issued |
Array
(
[id] => 3484208
[patent_doc_number] => 05399911
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-03-21
[patent_title] => 'Pulse detection circuit'
[patent_app_type] => 1
[patent_app_number] => 8/194954
[patent_app_country] => US
[patent_app_date] => 1994-02-14
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/399/05399911.pdf
[firstpage_image] =>[orig_patent_app_number] => 194954
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/194954 | Pulse detection circuit | Feb 13, 1994 | Issued |
Array
(
[id] => 3485817
[patent_doc_number] => 05457419
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-10
[patent_title] => 'MOSFET with temperature protection'
[patent_app_type] => 1
[patent_app_number] => 8/192820
[patent_app_country] => US
[patent_app_date] => 1994-02-07
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[pdf_file] => patents/05/457/05457419.pdf
[firstpage_image] =>[orig_patent_app_number] => 192820
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/192820 | MOSFET with temperature protection | Feb 6, 1994 | Issued |
Array
(
[id] => 3485788
[patent_doc_number] => 05457417
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-10
[patent_title] => 'Scaler circuit'
[patent_app_type] => 1
[patent_app_number] => 8/191495
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[pdf_file] => patents/05/457/05457417.pdf
[firstpage_image] =>[orig_patent_app_number] => 191495
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/191495 | Scaler circuit | Feb 3, 1994 | Issued |
Array
(
[id] => 3502582
[patent_doc_number] => 05532632
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-02
[patent_title] => 'Method and circuit for synchronizing an input data stream with a sample clock'
[patent_app_type] => 1
[patent_app_number] => 8/189826
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[pdf_file] => patents/05/532/05532632.pdf
[firstpage_image] =>[orig_patent_app_number] => 189826
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/189826 | Method and circuit for synchronizing an input data stream with a sample clock | Jan 31, 1994 | Issued |
Array
(
[id] => 3448269
[patent_doc_number] => 05467043
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-14
[patent_title] => 'Signal level converting circuit for liquid crystal display device receiving analog color signal'
[patent_app_type] => 1
[patent_app_number] => 8/189743
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[firstpage_image] =>[orig_patent_app_number] => 189743
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/189743 | Signal level converting circuit for liquid crystal display device receiving analog color signal | Jan 31, 1994 | Issued |
Array
(
[id] => 3454553
[patent_doc_number] => 05424673
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-06-13
[patent_title] => 'LCD display precharge regulator circuit'
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[firstpage_image] =>[orig_patent_app_number] => 188527
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/188527 | LCD display precharge regulator circuit | Jan 27, 1994 | Issued |
Array
(
[id] => 3433301
[patent_doc_number] => 05455529
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-03
[patent_title] => 'Circuit assembly for power semiconductors'
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[firstpage_image] =>[orig_patent_app_number] => 160961
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/160961 | Circuit assembly for power semiconductors | Dec 1, 1993 | Issued |
Array
(
[id] => 3112743
[patent_doc_number] => 05408137
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[patent_kind] => NA
[patent_issue_date] => 1995-04-18
[patent_title] => 'Output driver circuit with high breakdown voltage'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/159213 | Output driver circuit with high breakdown voltage | Nov 29, 1993 | Issued |
Array
(
[id] => 3098388
[patent_doc_number] => 05369316
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[patent_kind] => NA
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[patent_title] => 'Advanced output buffer with reduced voltage swing at output terminal'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/155623 | Advanced output buffer with reduced voltage swing at output terminal | Nov 21, 1993 | Issued |
Array
(
[id] => 3485937
[patent_doc_number] => 05406146
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[patent_kind] => NA
[patent_issue_date] => 1995-04-11
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[firstpage_image] =>[orig_patent_app_number] => 151332
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/151332 | Circuit and method for generating a buffered output having low distortion | Nov 8, 1993 | Issued |
Array
(
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Array
(
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Array
(
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[firstpage_image] =>[orig_patent_app_number] => 140944
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/140944 | Off-line bootstrap startup circuit | Oct 24, 1993 | Issued |