Search

Jeffery Shawn Zweizig

Examiner (ID: 3642, Phone: (571)272-1758 , Office: P/2842 )

Most Active Art Unit
2816
Art Unit(s)
2816, 2849, 2842, 2504
Total Applications
2640
Issued Applications
2460
Pending Applications
67
Abandoned Applications
136

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16294187 [patent_doc_number] => 10771045 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-08 [patent_title] => Apparatus and method for reducing output skew and transition delay of level shifter [patent_app_type] => utility [patent_app_number] => 16/451898 [patent_app_country] => US [patent_app_date] => 2019-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4783 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16451898 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/451898
Apparatus and method for reducing output skew and transition delay of level shifter Jun 24, 2019 Issued
Array ( [id] => 15352969 [patent_doc_number] => 20200014376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => Method for Biasing Outputs of a Folded Cascode Stage in a Comparator and Corresponding Comparator [patent_app_type] => utility [patent_app_number] => 16/449700 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4942 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449700 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/449700
Method for biasing outputs of a folded cascode stage in a comparator and corresponding comparator Jun 23, 2019 Issued
Array ( [id] => 15261097 [patent_doc_number] => 20190379282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => CHARGE PUMP CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/450129 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24388 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450129 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/450129
Charge pump circuit Jun 23, 2019 Issued
Array ( [id] => 15824485 [patent_doc_number] => 10637446 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-04-28 [patent_title] => Dual voltage range CMOS receiver [patent_app_type] => utility [patent_app_number] => 16/450619 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4190 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450619 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/450619
Dual voltage range CMOS receiver Jun 23, 2019 Issued
Array ( [id] => 15333585 [patent_doc_number] => 20200007122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => DRIVE CIRCUIT OF SWITCHING CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/450234 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6286 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450234 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/450234
Drive circuit of switching circuit Jun 23, 2019 Issued
Array ( [id] => 15734675 [patent_doc_number] => 10615779 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-04-07 [patent_title] => Adaptive threshold control system for detecting and adjusting the duration of regions of operation during transistor turn on and turn off [patent_app_type] => utility [patent_app_number] => 16/449025 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5817 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449025 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/449025
Adaptive threshold control system for detecting and adjusting the duration of regions of operation during transistor turn on and turn off Jun 20, 2019 Issued
Array ( [id] => 16247896 [patent_doc_number] => 10747249 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-08-18 [patent_title] => Reference buffer with integration path, on-chip capacitor, and gain stage separate from the integration path [patent_app_type] => utility [patent_app_number] => 16/448928 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 8076 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16448928 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/448928
Reference buffer with integration path, on-chip capacitor, and gain stage separate from the integration path Jun 20, 2019 Issued
Array ( [id] => 15520701 [patent_doc_number] => 10566957 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-02-18 [patent_title] => Current-mode logic latches for a PVT-robust mod 3 frequency divider [patent_app_type] => utility [patent_app_number] => 16/447404 [patent_app_country] => US [patent_app_date] => 2019-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4569 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16447404 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/447404
Current-mode logic latches for a PVT-robust mod 3 frequency divider Jun 19, 2019 Issued
Array ( [id] => 16250124 [patent_doc_number] => 10749507 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-08-18 [patent_title] => Current trimming system, method, and apparatus [patent_app_type] => utility [patent_app_number] => 16/445739 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6966 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16445739 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/445739
Current trimming system, method, and apparatus Jun 18, 2019 Issued
Array ( [id] => 15275833 [patent_doc_number] => 20190386651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => DRIVE CIRCUIT OF POWER SEMICONDUCTOR SWITCH [patent_app_type] => utility [patent_app_number] => 16/445483 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16445483 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/445483
Drive circuit of power semiconductor switch Jun 18, 2019 Issued
Array ( [id] => 15907801 [patent_doc_number] => 20200153421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => SEMICONDUCTOR APPARATUS INCLUDING CLOCK PATHS AND SEMICONDUCTOR SYSTEM INCLUDING THE SEMICONDUCTOR APPARATUS [patent_app_type] => utility [patent_app_number] => 16/444799 [patent_app_country] => US [patent_app_date] => 2019-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9287 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16444799 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/444799
Semiconductor apparatus including clock paths and semiconductor system including the semiconductor apparatus Jun 17, 2019 Issued
Array ( [id] => 16911764 [patent_doc_number] => 11043816 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-22 [patent_title] => Energy generation load compensation [patent_app_type] => utility [patent_app_number] => 16/441571 [patent_app_country] => US [patent_app_date] => 2019-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 14368 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16441571 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/441571
Energy generation load compensation Jun 13, 2019 Issued
Array ( [id] => 14969169 [patent_doc_number] => 20190312063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => ANALOG CIRCUIT AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/435966 [patent_app_country] => US [patent_app_date] => 2019-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 40716 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16435966 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/435966
Analog circuit and semiconductor device Jun 9, 2019 Issued
Array ( [id] => 15674137 [patent_doc_number] => 10601313 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Electronic device with a reconfigurable charging mechanism [patent_app_type] => utility [patent_app_number] => 16/430761 [patent_app_country] => US [patent_app_date] => 2019-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6523 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16430761 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/430761
Electronic device with a reconfigurable charging mechanism Jun 3, 2019 Issued
Array ( [id] => 14876639 [patent_doc_number] => 20190288561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => CHARGING CONTROL DEVICE, CHARGING CONTROL METHOD AND WIRELESS POWER RECEIVING DEVICE EQUIPPED WITH SAME [patent_app_type] => utility [patent_app_number] => 16/429943 [patent_app_country] => US [patent_app_date] => 2019-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10892 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16429943 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/429943
Charging control device, charging control method and wireless power receiving device equipped with same Jun 2, 2019 Issued
Array ( [id] => 15640765 [patent_doc_number] => 10593385 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-03-17 [patent_title] => Skew-tolerant timing signal gating [patent_app_type] => utility [patent_app_number] => 16/418204 [patent_app_country] => US [patent_app_date] => 2019-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 6483 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16418204 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/418204
Skew-tolerant timing signal gating May 20, 2019 Issued
Array ( [id] => 14813771 [patent_doc_number] => 20190273495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-05 [patent_title] => MULTIPLEXER CIRCUIT, AND METHOD AND SYSTEM FOR GENERATING LAYOUT DIAGRAM CORRESPONDING TO SAME [patent_app_type] => utility [patent_app_number] => 16/416871 [patent_app_country] => US [patent_app_date] => 2019-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14291 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16416871 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/416871
Multiplexer circuit, and method and system for generating layout diagram corresponding to same May 19, 2019 Issued
Array ( [id] => 17316624 [patent_doc_number] => 20210405673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => FULL SWING VOLTAGE CONVERSION CIRCUIT AND OPERATION UNIT, CHIP, HASH BOARD, AND COMPUTING DEVICE USING SAME [patent_app_type] => utility [patent_app_number] => 17/095545 [patent_app_country] => US [patent_app_date] => 2019-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17095545 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/095545
Full swing voltage conversion circuit and operation unit, chip, hash board, and computing device using same May 6, 2019 Issued
Array ( [id] => 14723823 [patent_doc_number] => 20190252975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => VOLTAGE CHARGE PUMP WITH SEGMENTED BOOST CAPACITORS [patent_app_type] => utility [patent_app_number] => 16/391373 [patent_app_country] => US [patent_app_date] => 2019-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4040 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16391373 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/391373
Voltage charge pump with segmented boost capacitors Apr 22, 2019 Issued
Array ( [id] => 15581851 [patent_doc_number] => 10581323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-03 [patent_title] => Voltage charge pump with segmented boost capacitors [patent_app_type] => utility [patent_app_number] => 16/387808 [patent_app_country] => US [patent_app_date] => 2019-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4040 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16387808 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/387808
Voltage charge pump with segmented boost capacitors Apr 17, 2019 Issued
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