
Jeffery Shawn Zweizig
Examiner (ID: 12123, Phone: (571)272-1758 , Office: P/2842 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2849, 2816, 2842, 2504 |
| Total Applications | 2645 |
| Issued Applications | 2451 |
| Pending Applications | 87 |
| Abandoned Applications | 136 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4783173
[patent_doc_number] => 20080136502
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-06-12
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 11/987073
[patent_app_country] => US
[patent_app_date] => 2007-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 12917
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0136/20080136502.pdf
[firstpage_image] =>[orig_patent_app_number] => 11987073
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/987073 | Semiconductor integrated circuit including charging pump | Nov 26, 2007 | Issued |
Array
(
[id] => 4897343
[patent_doc_number] => 20080116956
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-22
[patent_title] => 'Semiconductor device operating in an active mode and a standby mode'
[patent_app_type] => utility
[patent_app_number] => 11/984464
[patent_app_country] => US
[patent_app_date] => 2007-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7812
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0116/20080116956.pdf
[firstpage_image] =>[orig_patent_app_number] => 11984464
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/984464 | Semiconductor device operating in an active mode and a standby mode | Nov 18, 2007 | Issued |
Array
(
[id] => 4783176
[patent_doc_number] => 20080136505
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-06-12
[patent_title] => 'INTEGRATED CIRCUIT WITH STANDBY MODE MINIMIZING CURRENT CONSUMPTION'
[patent_app_type] => utility
[patent_app_number] => 11/939946
[patent_app_country] => US
[patent_app_date] => 2007-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 6141
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0136/20080136505.pdf
[firstpage_image] =>[orig_patent_app_number] => 11939946
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/939946 | Integrated circuit with standby mode minimizing current consumption | Nov 13, 2007 | Issued |
Array
(
[id] => 4919757
[patent_doc_number] => 20080068070
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-03-20
[patent_title] => 'Internal voltage generator'
[patent_app_type] => utility
[patent_app_number] => 11/984009
[patent_app_country] => US
[patent_app_date] => 2007-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5443
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0068/20080068070.pdf
[firstpage_image] =>[orig_patent_app_number] => 11984009
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/984009 | Internal voltage generator | Nov 12, 2007 | Abandoned |
Array
(
[id] => 4897348
[patent_doc_number] => 20080116961
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-22
[patent_title] => 'CHARGE PUMP CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 11/939388
[patent_app_country] => US
[patent_app_date] => 2007-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3139
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0116/20080116961.pdf
[firstpage_image] =>[orig_patent_app_number] => 11939388
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/939388 | Charge pump circuit | Nov 12, 2007 | Issued |
Array
(
[id] => 5407882
[patent_doc_number] => 20090121780
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-14
[patent_title] => 'MULTIPLE-STAGE CHARGE PUMP WITH CHARGE RECYCLE CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 11/938314
[patent_app_country] => US
[patent_app_date] => 2007-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3191
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0121/20090121780.pdf
[firstpage_image] =>[orig_patent_app_number] => 11938314
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/938314 | MULTIPLE-STAGE CHARGE PUMP WITH CHARGE RECYCLE CIRCUIT | Nov 11, 2007 | Abandoned |
Array
(
[id] => 4897352
[patent_doc_number] => 20080116965
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-22
[patent_title] => 'REFERENCE VOLTAGE GENERATION CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 11/934970
[patent_app_country] => US
[patent_app_date] => 2007-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6683
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0116/20080116965.pdf
[firstpage_image] =>[orig_patent_app_number] => 11934970
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/934970 | Reference voltage generation circuit | Nov 4, 2007 | Issued |
Array
(
[id] => 267588
[patent_doc_number] => 07567115
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-28
[patent_title] => 'Fuse-fetching circuit and method for using the same'
[patent_app_type] => utility
[patent_app_number] => 11/933475
[patent_app_country] => US
[patent_app_date] => 2007-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1197
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/567/07567115.pdf
[firstpage_image] =>[orig_patent_app_number] => 11933475
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/933475 | Fuse-fetching circuit and method for using the same | Oct 31, 2007 | Issued |
Array
(
[id] => 292909
[patent_doc_number] => 07545205
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-06-09
[patent_title] => 'Low power on-chip global interconnects'
[patent_app_type] => utility
[patent_app_number] => 11/924791
[patent_app_country] => US
[patent_app_date] => 2007-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4840
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/545/07545205.pdf
[firstpage_image] =>[orig_patent_app_number] => 11924791
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/924791 | Low power on-chip global interconnects | Oct 25, 2007 | Issued |
Array
(
[id] => 191520
[patent_doc_number] => 07642834
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-01-05
[patent_title] => 'Level shifter concept for fast level transient design'
[patent_app_type] => utility
[patent_app_number] => 11/868417
[patent_app_country] => US
[patent_app_date] => 2007-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 4285
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/642/07642834.pdf
[firstpage_image] =>[orig_patent_app_number] => 11868417
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/868417 | Level shifter concept for fast level transient design | Oct 4, 2007 | Issued |
Array
(
[id] => 5320515
[patent_doc_number] => 20090058505
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-03-05
[patent_title] => 'VOLTAGE CONVERTING CIRCUIT AND BATTERY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/867756
[patent_app_country] => US
[patent_app_date] => 2007-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 13056
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0058/20090058505.pdf
[firstpage_image] =>[orig_patent_app_number] => 11867756
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/867756 | Voltage converting circuit and battery device | Oct 4, 2007 | Issued |
Array
(
[id] => 4566673
[patent_doc_number] => 07839209
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-11-23
[patent_title] => 'Tunnel field effect transistor'
[patent_app_type] => utility
[patent_app_number] => 12/444140
[patent_app_country] => US
[patent_app_date] => 2007-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 2859
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/839/07839209.pdf
[firstpage_image] =>[orig_patent_app_number] => 12444140
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/444140 | Tunnel field effect transistor | Oct 2, 2007 | Issued |
Array
(
[id] => 373836
[patent_doc_number] => 07474142
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-01-06
[patent_title] => 'Internal voltage generating circuit'
[patent_app_type] => utility
[patent_app_number] => 11/905530
[patent_app_country] => US
[patent_app_date] => 2007-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 5333
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/474/07474142.pdf
[firstpage_image] =>[orig_patent_app_number] => 11905530
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/905530 | Internal voltage generating circuit | Oct 1, 2007 | Issued |
Array
(
[id] => 236695
[patent_doc_number] => 07595677
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-09-29
[patent_title] => 'Arbitrary clock circuit and applications thereof'
[patent_app_type] => utility
[patent_app_number] => 11/863686
[patent_app_country] => US
[patent_app_date] => 2007-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4001
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/595/07595677.pdf
[firstpage_image] =>[orig_patent_app_number] => 11863686
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/863686 | Arbitrary clock circuit and applications thereof | Sep 27, 2007 | Issued |
Array
(
[id] => 264329
[patent_doc_number] => 07570098
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-04
[patent_title] => 'Active voltage-clamping gate driving circuit'
[patent_app_type] => utility
[patent_app_number] => 11/862317
[patent_app_country] => US
[patent_app_date] => 2007-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 5737
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/570/07570098.pdf
[firstpage_image] =>[orig_patent_app_number] => 11862317
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/862317 | Active voltage-clamping gate driving circuit | Sep 26, 2007 | Issued |
Array
(
[id] => 174395
[patent_doc_number] => 07659775
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-09
[patent_title] => 'Output differential stage'
[patent_app_type] => utility
[patent_app_number] => 11/861364
[patent_app_country] => US
[patent_app_date] => 2007-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2060
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/659/07659775.pdf
[firstpage_image] =>[orig_patent_app_number] => 11861364
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/861364 | Output differential stage | Sep 25, 2007 | Issued |
Array
(
[id] => 4795737
[patent_doc_number] => 20080007323
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-10
[patent_title] => 'Systems and methods forminimizing static leakage of an integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 11/900971
[patent_app_country] => US
[patent_app_date] => 2007-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 9091
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0007/20080007323.pdf
[firstpage_image] =>[orig_patent_app_number] => 11900971
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/900971 | Systems and methods for minimizing static leakage of an integrated circuit | Sep 13, 2007 | Issued |
Array
(
[id] => 4795739
[patent_doc_number] => 20080007325
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-10
[patent_title] => 'Current source circuit'
[patent_app_type] => utility
[patent_app_number] => 11/896198
[patent_app_country] => US
[patent_app_date] => 2007-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4931
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0007/20080007325.pdf
[firstpage_image] =>[orig_patent_app_number] => 11896198
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/896198 | Current source circuit | Aug 29, 2007 | Issued |
Array
(
[id] => 6312979
[patent_doc_number] => 20100194466
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-05
[patent_title] => 'QUANTUM BIT VARIABLE COUPLING METHOD, QUANTUM COMPUTING CIRCUIT USING THE METHOD, AND VARIABLE COUPLER'
[patent_app_type] => utility
[patent_app_number] => 12/439970
[patent_app_country] => US
[patent_app_date] => 2007-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6745
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0194/20100194466.pdf
[firstpage_image] =>[orig_patent_app_number] => 12439970
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/439970 | Quantum bit variable coupling method, quantum computing circuit using the method, and variable coupler | Aug 28, 2007 | Issued |
Array
(
[id] => 229419
[patent_doc_number] => 07602234
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-10-13
[patent_title] => 'Substantially zero temperature coefficient bias generator'
[patent_app_type] => utility
[patent_app_number] => 11/782478
[patent_app_country] => US
[patent_app_date] => 2007-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7079
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/602/07602234.pdf
[firstpage_image] =>[orig_patent_app_number] => 11782478
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/782478 | Substantially zero temperature coefficient bias generator | Jul 23, 2007 | Issued |