
Jeffery Shawn Zweizig
Examiner (ID: 12123, Phone: (571)272-1758 , Office: P/2842 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2849, 2816, 2842, 2504 |
| Total Applications | 2645 |
| Issued Applications | 2451 |
| Pending Applications | 87 |
| Abandoned Applications | 136 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 256913
[patent_doc_number] => 07576591
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-18
[patent_title] => 'Charge pump system and corresponding method for managing voltage generation'
[patent_app_type] => utility
[patent_app_number] => 11/780206
[patent_app_country] => US
[patent_app_date] => 2007-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5067
[patent_no_of_claims] => 17
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/576/07576591.pdf
[firstpage_image] =>[orig_patent_app_number] => 11780206
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/780206 | Charge pump system and corresponding method for managing voltage generation | Jul 18, 2007 | Issued |
Array
(
[id] => 4877235
[patent_doc_number] => 20080150618
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-06-26
[patent_title] => 'Apparatus and method for generating internal voltage in semiconductor integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 11/826913
[patent_app_country] => US
[patent_app_date] => 2007-07-19
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11826913
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/826913 | Apparatus and method for generating internal voltage in semiconductor integrated circuit | Jul 18, 2007 | Issued |
Array
(
[id] => 289484
[patent_doc_number] => 07548101
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-06-16
[patent_title] => 'Delay locked loop circuit for semiconductor memory apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/826916
[patent_app_country] => US
[patent_app_date] => 2007-07-19
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[pdf_file] => patents/07/548/07548101.pdf
[firstpage_image] =>[orig_patent_app_number] => 11826916
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/826916 | Delay locked loop circuit for semiconductor memory apparatus | Jul 18, 2007 | Issued |
Array
(
[id] => 212055
[patent_doc_number] => 07622962
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-11-24
[patent_title] => 'Sense amplifier control signal generating circuit of semiconductor memory apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/826924
[patent_app_country] => US
[patent_app_date] => 2007-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[firstpage_image] =>[orig_patent_app_number] => 11826924
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/826924 | Sense amplifier control signal generating circuit of semiconductor memory apparatus | Jul 18, 2007 | Issued |
Array
(
[id] => 186306
[patent_doc_number] => 07646226
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-01-12
[patent_title] => 'Adaptive bandwidth phase locked loops with current boosting circuits'
[patent_app_type] => utility
[patent_app_number] => 11/826901
[patent_app_country] => US
[patent_app_date] => 2007-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/07/646/07646226.pdf
[firstpage_image] =>[orig_patent_app_number] => 11826901
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/826901 | Adaptive bandwidth phase locked loops with current boosting circuits | Jul 18, 2007 | Issued |
Array
(
[id] => 4801043
[patent_doc_number] => 20080012630
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-17
[patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING CURRENT MIRROR CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 11/773996
[patent_app_country] => US
[patent_app_date] => 2007-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => publications/A1/0012/20080012630.pdf
[firstpage_image] =>[orig_patent_app_number] => 11773996
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/773996 | Semiconductor device including current mirror circuit | Jul 5, 2007 | Issued |
Array
(
[id] => 7595022
[patent_doc_number] => 07626440
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-12-01
[patent_title] => 'High speed level shift'
[patent_app_type] => utility
[patent_app_number] => 11/825164
[patent_app_country] => US
[patent_app_date] => 2007-07-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => patents/07/626/07626440.pdf
[firstpage_image] =>[orig_patent_app_number] => 11825164
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/825164 | High speed level shift | Jul 3, 2007 | Issued |
Array
(
[id] => 174389
[patent_doc_number] => 07659769
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-09
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/771779
[patent_app_country] => US
[patent_app_date] => 2007-06-29
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[pdf_file] => patents/07/659/07659769.pdf
[firstpage_image] =>[orig_patent_app_number] => 11771779
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/771779 | Semiconductor device | Jun 28, 2007 | Issued |
Array
(
[id] => 590707
[patent_doc_number] => 07443226
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-10-28
[patent_title] => 'Emitter area trim scheme for a PTAT current source'
[patent_app_type] => utility
[patent_app_number] => 11/766657
[patent_app_country] => US
[patent_app_date] => 2007-06-21
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[pdf_file] => patents/07/443/07443226.pdf
[firstpage_image] =>[orig_patent_app_number] => 11766657
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/766657 | Emitter area trim scheme for a PTAT current source | Jun 20, 2007 | Issued |
Array
(
[id] => 5245577
[patent_doc_number] => 20070241811
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-18
[patent_title] => 'Methods and Systems for Reducing Leakage Current in Semiconductor Circuits'
[patent_app_type] => utility
[patent_app_number] => 11/765273
[patent_app_country] => US
[patent_app_date] => 2007-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[pdf_file] => publications/A1/0241/20070241811.pdf
[firstpage_image] =>[orig_patent_app_number] => 11765273
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/765273 | Methods and systems for reducing leakage current in semiconductor circuits | Jun 18, 2007 | Issued |
Array
(
[id] => 5506286
[patent_doc_number] => 20090079493
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-03-26
[patent_title] => 'Temperature-Compensated Current Generator, for Instance for 1-10V Interfaces'
[patent_app_type] => utility
[patent_app_number] => 12/226501
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[patent_app_date] => 2007-06-04
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[pdf_file] => publications/A1/0079/20090079493.pdf
[firstpage_image] =>[orig_patent_app_number] => 12226501
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/226501 | Temperature-compensated current generator, for instance for 1-10V interfaces | Jun 3, 2007 | Issued |
Array
(
[id] => 4743788
[patent_doc_number] => 20080088389
[patent_country] => US
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[patent_issue_date] => 2008-04-17
[patent_title] => 'Charge Domain Filter Device'
[patent_app_type] => utility
[patent_app_number] => 11/754763
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[firstpage_image] =>[orig_patent_app_number] => 11754763
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/754763 | Charge domain filter device | May 28, 2007 | Issued |
Array
(
[id] => 589292
[patent_doc_number] => 07446596
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-11-04
[patent_title] => 'Low voltage charge pump'
[patent_app_type] => utility
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[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 11753932
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/753932 | Low voltage charge pump | May 24, 2007 | Issued |
Array
(
[id] => 4789934
[patent_doc_number] => 20080290907
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[patent_issue_date] => 2008-11-27
[patent_title] => 'THRESHOLD CONTROL CIRCUITRY FOR MULTIPLE CURRENT SIGNAL RECEIVERS'
[patent_app_type] => utility
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[firstpage_image] =>[orig_patent_app_number] => 11753266
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/753266 | Threshold control circuitry for multiple current signal receivers | May 23, 2007 | Issued |
Array
(
[id] => 4913531
[patent_doc_number] => 20080094130
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[patent_kind] => A1
[patent_issue_date] => 2008-04-24
[patent_title] => 'SUPPLY-INDEPENDENT BIASING CIRCUIT'
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[firstpage_image] =>[orig_patent_app_number] => 11751379
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/751379 | SUPPLY-INDEPENDENT BIASING CIRCUIT | May 20, 2007 | Abandoned |
Array
(
[id] => 5060335
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/804877 | MOSFET for synchronous rectification | May 20, 2007 | Issued |
Array
(
[id] => 356742
[patent_doc_number] => 07489182
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[patent_title] => 'Charge pump start up circuit and method thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/749872 | Charge pump start up circuit and method thereof | May 16, 2007 | Issued |
Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/747917 | Current biasing circuit | May 13, 2007 | Issued |
Array
(
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[patent_title] => 'METHOD AND CIRCUIT ARRANGEMENT FOR GENERATING A PERIODIC ELECTRIC SIGNAL WITH CONTROLLABLE PHASE'
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[pdf_file] => publications/A1/0268/20070268060.pdf
[firstpage_image] =>[orig_patent_app_number] => 11745790
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/745790 | Method and circuit arrangement for generating a periodic electric signal with controllable phase | May 7, 2007 | Issued |