
Jeffery Shawn Zweizig
Examiner (ID: 3642, Phone: (571)272-1758 , Office: P/2842 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2816, 2849, 2842, 2504 |
| Total Applications | 2640 |
| Issued Applications | 2460 |
| Pending Applications | 67 |
| Abandoned Applications | 136 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 844223
[patent_doc_number] => 07388421
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-06-17
[patent_title] => 'Fused trim circuit with test emulation and reduced static current drain'
[patent_app_type] => utility
[patent_app_number] => 11/466644
[patent_app_country] => US
[patent_app_date] => 2006-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1883
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/388/07388421.pdf
[firstpage_image] =>[orig_patent_app_number] => 11466644
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/466644 | Fused trim circuit with test emulation and reduced static current drain | Aug 22, 2006 | Issued |
Array
(
[id] => 4667672
[patent_doc_number] => 20080042732
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-21
[patent_title] => 'CONSTANT RATIO CURRENT SOURCE'
[patent_app_type] => utility
[patent_app_number] => 11/465430
[patent_app_country] => US
[patent_app_date] => 2006-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3172
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0042/20080042732.pdf
[firstpage_image] =>[orig_patent_app_number] => 11465430
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/465430 | Constant ratio current source | Aug 16, 2006 | Issued |
Array
(
[id] => 4667680
[patent_doc_number] => 20080042740
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-21
[patent_title] => 'LINEAR-IN-DECIBEL CURRENT GENERATORS'
[patent_app_type] => utility
[patent_app_number] => 11/464841
[patent_app_country] => US
[patent_app_date] => 2006-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2926
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0042/20080042740.pdf
[firstpage_image] =>[orig_patent_app_number] => 11464841
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/464841 | Linear-in-decibel current generators | Aug 15, 2006 | Issued |
Array
(
[id] => 908680
[patent_doc_number] => 07332946
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-02-19
[patent_title] => 'Power supply voltage detection circuitry and methods for use of the same'
[patent_app_type] => utility
[patent_app_number] => 11/501673
[patent_app_country] => US
[patent_app_date] => 2006-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4909
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 31
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/332/07332946.pdf
[firstpage_image] =>[orig_patent_app_number] => 11501673
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/501673 | Power supply voltage detection circuitry and methods for use of the same | Aug 7, 2006 | Issued |
Array
(
[id] => 881677
[patent_doc_number] => 07355469
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-08
[patent_title] => 'DC power supply voltage regulator circuit'
[patent_app_type] => utility
[patent_app_number] => 11/481335
[patent_app_country] => US
[patent_app_date] => 2006-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4617
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 267
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/355/07355469.pdf
[firstpage_image] =>[orig_patent_app_number] => 11481335
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/481335 | DC power supply voltage regulator circuit | Jul 2, 2006 | Issued |
Array
(
[id] => 5169371
[patent_doc_number] => 20070069802
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-29
[patent_title] => 'Internal voltage generator'
[patent_app_type] => utility
[patent_app_number] => 11/478077
[patent_app_country] => US
[patent_app_date] => 2006-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2332
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0069/20070069802.pdf
[firstpage_image] =>[orig_patent_app_number] => 11478077
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/478077 | Internal voltage generator | Jun 29, 2006 | Issued |
Array
(
[id] => 4930871
[patent_doc_number] => 20080001646
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-03
[patent_title] => 'Thermally stable semiconductor power device'
[patent_app_type] => utility
[patent_app_number] => 11/480041
[patent_app_country] => US
[patent_app_date] => 2006-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3306
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20080001646.pdf
[firstpage_image] =>[orig_patent_app_number] => 11480041
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/480041 | Thermally stable semiconductor power device | Jun 29, 2006 | Issued |
Array
(
[id] => 4930880
[patent_doc_number] => 20080001655
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-03
[patent_title] => 'Programmable power gating circuit'
[patent_app_type] => utility
[patent_app_number] => 11/478394
[patent_app_country] => US
[patent_app_date] => 2006-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4369
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20080001655.pdf
[firstpage_image] =>[orig_patent_app_number] => 11478394
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/478394 | Programmable power gating circuit | Jun 28, 2006 | Issued |
Array
(
[id] => 4930876
[patent_doc_number] => 20080001651
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-03
[patent_title] => 'N-CHANNEL NEGATIVE CHARGE PUMP'
[patent_app_type] => utility
[patent_app_number] => 11/479631
[patent_app_country] => US
[patent_app_date] => 2006-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4287
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20080001651.pdf
[firstpage_image] =>[orig_patent_app_number] => 11479631
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/479631 | N-channel negative charge pump | Jun 28, 2006 | Issued |
Array
(
[id] => 4930872
[patent_doc_number] => 20080001647
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-03
[patent_title] => 'Temperature stabilized integrated circuits'
[patent_app_type] => utility
[patent_app_number] => 11/478954
[patent_app_country] => US
[patent_app_date] => 2006-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1197
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20080001647.pdf
[firstpage_image] =>[orig_patent_app_number] => 11478954
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/478954 | Temperature stabilized integrated circuits | Jun 28, 2006 | Abandoned |
Array
(
[id] => 4993451
[patent_doc_number] => 20070008796
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-11
[patent_title] => 'Device and method for regulating the threshold voltage of a transistor'
[patent_app_type] => utility
[patent_app_number] => 11/477077
[patent_app_country] => US
[patent_app_date] => 2006-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5531
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0008/20070008796.pdf
[firstpage_image] =>[orig_patent_app_number] => 11477077
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/477077 | Device and method for regulating the threshold voltage of a transistor | Jun 27, 2006 | Issued |
Array
(
[id] => 338531
[patent_doc_number] => 07504876
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-03-17
[patent_title] => 'Substrate bias feedback scheme to reduce chip leakage power'
[patent_app_type] => utility
[patent_app_number] => 11/478006
[patent_app_country] => US
[patent_app_date] => 2006-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3512
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/504/07504876.pdf
[firstpage_image] =>[orig_patent_app_number] => 11478006
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/478006 | Substrate bias feedback scheme to reduce chip leakage power | Jun 27, 2006 | Issued |
Array
(
[id] => 4992684
[patent_doc_number] => 20070008028
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-11
[patent_title] => 'Over boosting prevention circuit'
[patent_app_type] => utility
[patent_app_number] => 11/475258
[patent_app_country] => US
[patent_app_date] => 2006-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6850
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0008/20070008028.pdf
[firstpage_image] =>[orig_patent_app_number] => 11475258
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/475258 | Over boosting prevention circuit | Jun 26, 2006 | Abandoned |
Array
(
[id] => 5197168
[patent_doc_number] => 20070296486
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-27
[patent_title] => 'VOLTAGE GENERATOR CIRCUIT, METHOD FOR PROVIDING AN OUTPUT VOLTAGE AND ELECTRONIC MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/473519
[patent_app_country] => US
[patent_app_date] => 2006-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7763
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0296/20070296486.pdf
[firstpage_image] =>[orig_patent_app_number] => 11473519
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/473519 | Voltage generator circuit, method for providing an output voltage and electronic memory device | Jun 22, 2006 | Issued |
Array
(
[id] => 5234340
[patent_doc_number] => 20070126495
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-07
[patent_title] => 'Precision reversed bandgap voltage reference circuits and method'
[patent_app_type] => utility
[patent_app_number] => 11/472791
[patent_app_country] => US
[patent_app_date] => 2006-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8328
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0126/20070126495.pdf
[firstpage_image] =>[orig_patent_app_number] => 11472791
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/472791 | Precision reversed bandgap voltage reference circuits and method | Jun 21, 2006 | Issued |
Array
(
[id] => 5163566
[patent_doc_number] => 20070285150
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-13
[patent_title] => 'Method and system for providing a charge pump very low voltage applications'
[patent_app_type] => utility
[patent_app_number] => 11/449052
[patent_app_country] => US
[patent_app_date] => 2006-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5916
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0285/20070285150.pdf
[firstpage_image] =>[orig_patent_app_number] => 11449052
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/449052 | Method and system for providing a charge pump very low voltage applications | Jun 6, 2006 | Issued |
Array
(
[id] => 585416
[patent_doc_number] => 07453314
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-11-18
[patent_title] => 'Temperature-independent current source circuit'
[patent_app_type] => utility
[patent_app_number] => 11/447586
[patent_app_country] => US
[patent_app_date] => 2006-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 3014
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/453/07453314.pdf
[firstpage_image] =>[orig_patent_app_number] => 11447586
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/447586 | Temperature-independent current source circuit | Jun 4, 2006 | Issued |
Array
(
[id] => 432825
[patent_doc_number] => 07265602
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-09-04
[patent_title] => 'Voltage generating circuit with two resistor ladders'
[patent_app_type] => utility
[patent_app_number] => 11/433356
[patent_app_country] => US
[patent_app_date] => 2006-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 9292
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/265/07265602.pdf
[firstpage_image] =>[orig_patent_app_number] => 11433356
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/433356 | Voltage generating circuit with two resistor ladders | May 14, 2006 | Issued |
Array
(
[id] => 334843
[patent_doc_number] => 07508256
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-03-24
[patent_title] => 'Integrated circuit with signal bus formed by cell abutment of logic cells'
[patent_app_type] => utility
[patent_app_number] => 11/433158
[patent_app_country] => US
[patent_app_date] => 2006-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4717
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 36
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/508/07508256.pdf
[firstpage_image] =>[orig_patent_app_number] => 11433158
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/433158 | Integrated circuit with signal bus formed by cell abutment of logic cells | May 11, 2006 | Issued |
Array
(
[id] => 5146306
[patent_doc_number] => 20070046360
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-01
[patent_title] => 'Electronic array having nodes and methods'
[patent_app_type] => utility
[patent_app_number] => 11/429401
[patent_app_country] => US
[patent_app_date] => 2006-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 32
[patent_no_of_words] => 13118
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0046/20070046360.pdf
[firstpage_image] =>[orig_patent_app_number] => 11429401
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/429401 | Electronic array having nodes and methods | May 4, 2006 | Abandoned |