
Jeffery Shawn Zweizig
Examiner (ID: 3642, Phone: (571)272-1758 , Office: P/2842 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2816, 2849, 2842, 2504 |
| Total Applications | 2640 |
| Issued Applications | 2460 |
| Pending Applications | 67 |
| Abandoned Applications | 136 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 513902
[patent_doc_number] => 07199639
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-04-03
[patent_title] => 'Semiconductor device with level converter having signal-level shifting block and signal-level determination block'
[patent_app_type] => utility
[patent_app_number] => 11/410956
[patent_app_country] => US
[patent_app_date] => 2006-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 28
[patent_no_of_words] => 16810
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 302
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/199/07199639.pdf
[firstpage_image] =>[orig_patent_app_number] => 11410956
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/410956 | Semiconductor device with level converter having signal-level shifting block and signal-level determination block | Apr 25, 2006 | Issued |
Array
(
[id] => 5168805
[patent_doc_number] => 20070069236
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-29
[patent_title] => 'Control circuit and method for driving a half-bridge circuit'
[patent_app_type] => utility
[patent_app_number] => 11/411199
[patent_app_country] => US
[patent_app_date] => 2006-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6830
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0069/20070069236.pdf
[firstpage_image] =>[orig_patent_app_number] => 11411199
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/411199 | Control circuit and method for driving a half-bridge circuit | Apr 24, 2006 | Issued |
Array
(
[id] => 429176
[patent_doc_number] => 07268614
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-09-11
[patent_title] => 'Low supply voltage bias circuit, semiconductor device, wafer and system including same, and method of generating a bias reference'
[patent_app_type] => utility
[patent_app_number] => 11/411286
[patent_app_country] => US
[patent_app_date] => 2006-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 4754
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/268/07268614.pdf
[firstpage_image] =>[orig_patent_app_number] => 11411286
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/411286 | Low supply voltage bias circuit, semiconductor device, wafer and system including same, and method of generating a bias reference | Apr 24, 2006 | Issued |
Array
(
[id] => 5670747
[patent_doc_number] => 20060176101
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-10
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 11/396543
[patent_app_country] => US
[patent_app_date] => 2006-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 12886
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0176/20060176101.pdf
[firstpage_image] =>[orig_patent_app_number] => 11396543
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/396543 | Semiconductor integrated circuit | Apr 3, 2006 | Issued |
Array
(
[id] => 5089491
[patent_doc_number] => 20070229130
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-04
[patent_title] => 'CHARGE PUMP CIRCUIT AND METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 11/278145
[patent_app_country] => US
[patent_app_date] => 2006-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2287
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0229/20070229130.pdf
[firstpage_image] =>[orig_patent_app_number] => 11278145
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/278145 | Charge pump circuit and method thereof | Mar 30, 2006 | Issued |
Array
(
[id] => 462087
[patent_doc_number] => 07242242
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-07-10
[patent_title] => 'Fast dynamic low-voltage current mirror with compensated error'
[patent_app_type] => utility
[patent_app_number] => 11/393153
[patent_app_country] => US
[patent_app_date] => 2006-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 3847
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/242/07242242.pdf
[firstpage_image] =>[orig_patent_app_number] => 11393153
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/393153 | Fast dynamic low-voltage current mirror with compensated error | Mar 28, 2006 | Issued |
Array
(
[id] => 7602984
[patent_doc_number] => 07236050
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-06-26
[patent_title] => 'Fast dynamic low-voltage current mirror with compensated error'
[patent_app_type] => utility
[patent_app_number] => 11/393070
[patent_app_country] => US
[patent_app_date] => 2006-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 3848
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/236/07236050.pdf
[firstpage_image] =>[orig_patent_app_number] => 11393070
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/393070 | Fast dynamic low-voltage current mirror with compensated error | Mar 28, 2006 | Issued |
Array
(
[id] => 5653353
[patent_doc_number] => 20060139088
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-29
[patent_title] => 'Biasing scheme for low supply headroom applications'
[patent_app_type] => utility
[patent_app_number] => 11/364030
[patent_app_country] => US
[patent_app_date] => 2006-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 2454
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0139/20060139088.pdf
[firstpage_image] =>[orig_patent_app_number] => 11364030
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/364030 | Biasing scheme for low supply headroom applications | Feb 28, 2006 | Issued |
Array
(
[id] => 5646490
[patent_doc_number] => 20060132222
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-22
[patent_title] => 'Method of forming a floating charge pump and structure therefor'
[patent_app_type] => utility
[patent_app_number] => 11/355161
[patent_app_country] => US
[patent_app_date] => 2006-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3167
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0132/20060132222.pdf
[firstpage_image] =>[orig_patent_app_number] => 11355161
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/355161 | Method of forming a floating charge pump and structure therefor | Feb 15, 2006 | Issued |
Array
(
[id] => 5681928
[patent_doc_number] => 20060198198
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-07
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 11/342617
[patent_app_country] => US
[patent_app_date] => 2006-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7082
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0198/20060198198.pdf
[firstpage_image] =>[orig_patent_app_number] => 11342617
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/342617 | Semiconductor integrated circuit having controller controlling the change rate of power voltage | Jan 30, 2006 | Issued |
Array
(
[id] => 911822
[patent_doc_number] => 07330067
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-02-12
[patent_title] => 'Semiconductor apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/339799
[patent_app_country] => US
[patent_app_date] => 2006-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3891
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/330/07330067.pdf
[firstpage_image] =>[orig_patent_app_number] => 11339799
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/339799 | Semiconductor apparatus | Jan 25, 2006 | Issued |
Array
(
[id] => 5869858
[patent_doc_number] => 20060164153
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-27
[patent_title] => 'Characteristic adjustment circuit for logic circuit, circuit, and method of adjusting a characteristic of circuit'
[patent_app_type] => utility
[patent_app_number] => 11/338632
[patent_app_country] => US
[patent_app_date] => 2006-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2344
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0164/20060164153.pdf
[firstpage_image] =>[orig_patent_app_number] => 11338632
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/338632 | Characteristic adjustment circuit for logic circuit, circuit, and method of adjusting a characteristic of circuit | Jan 24, 2006 | Abandoned |
Array
(
[id] => 844220
[patent_doc_number] => 07388418
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-06-17
[patent_title] => 'Circuit for generating a floating reference voltage, in CMOS technology'
[patent_app_type] => utility
[patent_app_number] => 11/337818
[patent_app_country] => US
[patent_app_date] => 2006-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3155
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 21
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/388/07388418.pdf
[firstpage_image] =>[orig_patent_app_number] => 11337818
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/337818 | Circuit for generating a floating reference voltage, in CMOS technology | Jan 22, 2006 | Issued |
Array
(
[id] => 5849133
[patent_doc_number] => 20060232324
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-10-19
[patent_title] => 'CONTROL CIRCUIT FOR COMMAND SIGNALS OF CLOCK GENERATOR'
[patent_app_type] => utility
[patent_app_number] => 11/306922
[patent_app_country] => US
[patent_app_date] => 2006-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1094
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0232/20060232324.pdf
[firstpage_image] =>[orig_patent_app_number] => 11306922
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/306922 | Control circuit for command signals of clock generator | Jan 16, 2006 | Issued |
Array
(
[id] => 349379
[patent_doc_number] => 07495498
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-02-24
[patent_title] => 'Radiation tolerant solid-state relay'
[patent_app_type] => utility
[patent_app_number] => 11/328827
[patent_app_country] => US
[patent_app_date] => 2006-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3501
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/495/07495498.pdf
[firstpage_image] =>[orig_patent_app_number] => 11328827
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/328827 | Radiation tolerant solid-state relay | Jan 9, 2006 | Issued |
Array
(
[id] => 415769
[patent_doc_number] => 07279955
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-10-09
[patent_title] => 'Reference voltage generating circuit'
[patent_app_type] => utility
[patent_app_number] => 11/275460
[patent_app_country] => US
[patent_app_date] => 2006-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 8054
[patent_no_of_claims] => 51
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/279/07279955.pdf
[firstpage_image] =>[orig_patent_app_number] => 11275460
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/275460 | Reference voltage generating circuit | Jan 5, 2006 | Issued |
Array
(
[id] => 364028
[patent_doc_number] => 07482844
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-01-27
[patent_title] => 'Analog-to-digital converter with programmable floating gate'
[patent_app_type] => utility
[patent_app_number] => 11/326832
[patent_app_country] => US
[patent_app_date] => 2006-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 9266
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/482/07482844.pdf
[firstpage_image] =>[orig_patent_app_number] => 11326832
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/326832 | Analog-to-digital converter with programmable floating gate | Jan 4, 2006 | Issued |
Array
(
[id] => 821062
[patent_doc_number] => 07408397
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-08-05
[patent_title] => 'Digital-to-analog converter with programmable floating gate'
[patent_app_type] => utility
[patent_app_number] => 11/326834
[patent_app_country] => US
[patent_app_date] => 2006-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 9267
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/408/07408397.pdf
[firstpage_image] =>[orig_patent_app_number] => 11326834
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/326834 | Digital-to-analog converter with programmable floating gate | Jan 4, 2006 | Issued |
Array
(
[id] => 5840524
[patent_doc_number] => 20060120163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-08
[patent_title] => 'Current mirror with programmable floating gate'
[patent_app_type] => utility
[patent_app_number] => 11/326833
[patent_app_country] => US
[patent_app_date] => 2006-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 9244
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0120/20060120163.pdf
[firstpage_image] =>[orig_patent_app_number] => 11326833
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/326833 | Current mirror with programmable floating gate | Jan 4, 2006 | Issued |
Array
(
[id] => 830630
[patent_doc_number] => 07400186
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-07-15
[patent_title] => 'Bidirectional body bias regulation'
[patent_app_type] => utility
[patent_app_number] => 11/324628
[patent_app_country] => US
[patent_app_date] => 2006-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 2915
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/400/07400186.pdf
[firstpage_image] =>[orig_patent_app_number] => 11324628
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/324628 | Bidirectional body bias regulation | Jan 2, 2006 | Issued |