
Jeffery Shawn Zweizig
Examiner (ID: 5312, Phone: (571)272-1758 , Office: P/2842 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2816, 2842, 2849, 2504 |
| Total Applications | 2641 |
| Issued Applications | 2460 |
| Pending Applications | 70 |
| Abandoned Applications | 136 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
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[id] => 5351453
[patent_doc_number] => 20090006814
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[patent_kind] => A1
[patent_issue_date] => 2009-01-01
[patent_title] => 'Immediate and Displacement Extraction and Decode Mechanism'
[patent_app_type] => utility
[patent_app_number] => 11/768417
[patent_app_country] => US
[patent_app_date] => 2007-06-26
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[pdf_file] => publications/A1/0006/20090006814.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/768417 | Immediate and displacement extraction and decode mechanism | Jun 25, 2007 | Issued |
Array
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[patent_issue_date] => 2008-01-17
[patent_title] => 'PROCESSOR ARCHITECTURE, FOR INSTANCE FOR MULTIMEDIA APPLICATIONS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/768481 | Processor architecture with processing clusters providing vector and scalar data processing capability | Jun 25, 2007 | Issued |
Array
(
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[patent_doc_number] => 07827391
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[patent_issue_date] => 2010-11-02
[patent_title] => 'Method and apparatus for single-stepping coherence events in a multiprocessor system under software control'
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[patent_app_number] => 11/768857
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/768857 | Method and apparatus for single-stepping coherence events in a multiprocessor system under software control | Jun 25, 2007 | Issued |
Array
(
[id] => 4589863
[patent_doc_number] => 07831818
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[patent_kind] => B2
[patent_issue_date] => 2010-11-09
[patent_title] => 'Exception-based timer control'
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[patent_app_number] => 11/765891
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/765891 | Exception-based timer control | Jun 19, 2007 | Issued |
Array
(
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[patent_doc_number] => 20080320278
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[patent_issue_date] => 2008-12-25
[patent_title] => 'SYSTEM AND METHOD FOR EFFICIENT DATA TRANSMISSION IN A MULTI-PROCESSOR ENVIRONMENT'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/765372 | System and method for efficient data transmission in a multi-processor environment | Jun 18, 2007 | Issued |
Array
(
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[patent_title] => 'PARALLEL DATA PROCESSING APPARATUS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/765421 | PARALLEL DATA PROCESSING APPARATUS | Jun 18, 2007 | Abandoned |
Array
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[patent_title] => 'Central processing unit having a micro-code engine'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/790918 | Central processing unit having a micro-code engine | Apr 29, 2007 | Abandoned |
Array
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[patent_doc_number] => 07730280
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[patent_issue_date] => 2010-06-01
[patent_title] => 'Methods and apparatus for independent processor node operations in a SIMD array processor'
[patent_app_type] => utility
[patent_app_number] => 11/736814
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/736814 | Methods and apparatus for independent processor node operations in a SIMD array processor | Apr 17, 2007 | Issued |
Array
(
[id] => 4889055
[patent_doc_number] => 20080263387
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[patent_issue_date] => 2008-10-23
[patent_title] => 'FAULT RECOVERY ON A PARALLEL COMPUTER SYSTEM WITH A TORUS NETWORK'
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[patent_app_number] => 11/736923
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[patent_app_date] => 2007-04-18
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/736923 | Fault recovery on a parallel computer system with a torus network | Apr 17, 2007 | Issued |
Array
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[patent_title] => 'Universal Register Rename Mechanism for Instructions with Multiple Targets in a Microprocessor'
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[patent_app_number] => 11/736855
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Array
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[patent_title] => 'Universal Register Rename Mechanism for Targets of Different Instruction Types in a Microprocessor'
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Array
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Array
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Array
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/687264 | Microcontroller with low-cost digital signal processing extensions | Mar 15, 2007 | Issued |
Array
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Array
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Array
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