Jeffery Shawn Zweizig

Array ( [id] => 646773 [patent_doc_number] => 07119604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-10 [patent_title] => 'Back-bias voltage regulator having temperature and process variation compensation and related method of regulating a back-bias voltage' [patent_app_type] => utility [patent_app_number] => 10/871292 [patent_app_country] => US [patent_app_date] => 2004-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4566 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/119/07119604.pdf [firstpage_image] =>[orig_patent_app_number] => 10871292 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 656253 [patent_doc_number] => 07109784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-19 [patent_title] => 'Gate bias circuit for MOS Charge Coupled Devices' [patent_app_type] => utility [patent_app_number] => 10/870488 [patent_app_country] => US [patent_app_date] => 2004-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2690 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/109/07109784.pdf [firstpage_image] =>[orig_patent_app_number] => 10870488 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7273512 [patent_doc_number] => 20040232963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'Methods and systems for limiting supply bounce' [patent_app_type] => new [patent_app_number] => 10/865966 [patent_app_country] => US [patent_app_date] => 2004-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6030 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20040232963.pdf [firstpage_image] =>[orig_patent_app_number] => 10865966 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 523927 [patent_doc_number] => 07190212 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-13 [patent_title] => 'Power-up and BGREF circuitry' [patent_app_type] => utility [patent_app_number] => 10/862401 [patent_app_country] => US [patent_app_date] => 2004-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3087 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/190/07190212.pdf [firstpage_image] =>[orig_patent_app_number] => 10862401 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 767575 [patent_doc_number] => 07009443 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-07 [patent_title] => 'Method and circuit for fuse programming and endpoint detection' [patent_app_type] => utility [patent_app_number] => 10/862675 [patent_app_country] => US [patent_app_date] => 2004-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4416 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/009/07009443.pdf [firstpage_image] =>[orig_patent_app_number] => 10862675 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7364072 [patent_doc_number] => 20040217650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => new [patent_app_number] => 10/860011 [patent_app_country] => US [patent_app_date] => 2004-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 13787 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20040217650.pdf [firstpage_image] =>[orig_patent_app_number] => 10860011 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 760052 [patent_doc_number] => 07015732 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-03-21 [patent_title] => 'Power-on reset circuit with low standby current and self-adaptive reset pulse width' [patent_app_type] => utility [patent_app_number] => 10/860423 [patent_app_country] => US [patent_app_date] => 2004-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 56 [patent_no_of_words] => 15724 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/015/07015732.pdf [firstpage_image] =>[orig_patent_app_number] => 10860423 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 688114 [patent_doc_number] => 07078940 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-18 [patent_title] => 'Current comb generator' [patent_app_type] => utility [patent_app_number] => 10/857949 [patent_app_country] => US [patent_app_date] => 2004-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 1612 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/078/07078940.pdf [firstpage_image] =>[orig_patent_app_number] => 10857949 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 712756 [patent_doc_number] => 07057448 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-06 [patent_title] => 'Variable output-type constant current source circuit' [patent_app_type] => utility [patent_app_number] => 10/858760 [patent_app_country] => US [patent_app_date] => 2004-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4265 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/057/07057448.pdf [firstpage_image] =>[orig_patent_app_number] => 10858760 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5766657 [patent_doc_number] => 20050264340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-01 [patent_title] => 'METHOD AND APPARATUS FOR REDUCING CHARGE INJECTION IN CONTROL OF MEMS ELECTROSTATIC ACTUATOR ARRAY' [patent_app_type] => utility [patent_app_number] => 10/855359 [patent_app_country] => US [patent_app_date] => 2004-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4373 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20050264340.pdf [firstpage_image] =>[orig_patent_app_number] => 10855359 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 504499 [patent_doc_number] => 07205826 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-17 [patent_title] => 'Precharged power-down biasing circuit' [patent_app_type] => utility [patent_app_number] => 10/854635 [patent_app_country] => US [patent_app_date] => 2004-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 2499 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/205/07205826.pdf [firstpage_image] =>[orig_patent_app_number] => 10854635 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 677505 [patent_doc_number] => 07088165 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-08 [patent_title] => 'Voltage level shifter and sequential pulse generator' [patent_app_type] => utility [patent_app_number] => 10/854813 [patent_app_country] => US [patent_app_date] => 2004-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2919 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/088/07088165.pdf [firstpage_image] =>[orig_patent_app_number] => 10854813 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5766632 [patent_doc_number] => 20050264329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-01 [patent_title] => 'High voltage tolerant power up detector' [patent_app_type] => utility [patent_app_number] => 10/856261 [patent_app_country] => US [patent_app_date] => 2004-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3701 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20050264329.pdf [firstpage_image] =>[orig_patent_app_number] => 10856261 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7120709 [patent_doc_number] => 20050012538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-20 [patent_title] => 'Electronic array having nodes and methods' [patent_app_type] => utility [patent_app_number] => 10/855983 [patent_app_country] => US [patent_app_date] => 2004-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 13109 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20050012538.pdf [firstpage_image] =>[orig_patent_app_number] => 10855983 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7609289 [patent_doc_number] => 06998900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-14 [patent_title] => 'Booster circuit, semiconductor device, and display device' [patent_app_type] => utility [patent_app_number] => 10/852209 [patent_app_country] => US [patent_app_date] => 2004-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 31 [patent_no_of_words] => 14494 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/998/06998900.pdf [firstpage_image] =>[orig_patent_app_number] => 10852209 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7196015 [patent_doc_number] => 20050041444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-24 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/851314 [patent_app_country] => US [patent_app_date] => 2004-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10298 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20050041444.pdf [firstpage_image] =>[orig_patent_app_number] => 10851314 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7163242 [patent_doc_number] => 20050200401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-15 [patent_title] => 'Internal voltage generator' [patent_app_type] => utility [patent_app_number] => 10/850843 [patent_app_country] => US [patent_app_date] => 2004-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2291 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20050200401.pdf [firstpage_image] =>[orig_patent_app_number] => 10850843 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 656250 [patent_doc_number] => 07109783 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-09-19 [patent_title] => 'Method and apparatus for voltage regulation within an integrated circuit' [patent_app_type] => utility [patent_app_number] => 10/847966 [patent_app_country] => US [patent_app_date] => 2004-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3962 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/109/07109783.pdf [firstpage_image] =>[orig_patent_app_number] => 10847966 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7414610 [patent_doc_number] => 20040207461 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-21 [patent_title] => 'Internal step-down power supply circuit' [patent_app_type] => new [patent_app_number] => 10/845215 [patent_app_country] => US [patent_app_date] => 2004-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8072 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20040207461.pdf [firstpage_image] =>[orig_patent_app_number] => 10845215 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 696719 [patent_doc_number] => 07071770 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-04 [patent_title] => 'Low supply voltage bias circuit, semiconductor device, wafer and system including same, and method of generating a bias reference' [patent_app_type] => utility [patent_app_number] => 10/841848 [patent_app_country] => US [patent_app_date] => 2004-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4708 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/071/07071770.pdf [firstpage_image] =>[orig_patent_app_number] => 10841848 [rel_patent_id] =>[rel_patent_doc_number] =>)