Jeffery Shawn Zweizig

Array ( [id] => 1190327 [patent_doc_number] => 06734718 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-11 [patent_title] => 'High voltage ripple reduction' [patent_app_type] => B1 [patent_app_number] => 10/328686 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 3732 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/734/06734718.pdf [firstpage_image] =>[orig_patent_app_number] => 10328686 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1146254 [patent_doc_number] => 06778004 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-17 [patent_title] => 'Decoupling capacitor multiplier' [patent_app_type] => B1 [patent_app_number] => 10/326485 [patent_app_country] => US [patent_app_date] => 2002-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3612 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/778/06778004.pdf [firstpage_image] =>[orig_patent_app_number] => 10326485 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1171335 [patent_doc_number] => 06756837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-29 [patent_title] => 'Booster circuit' [patent_app_type] => B2 [patent_app_number] => 10/320641 [patent_app_country] => US [patent_app_date] => 2002-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 11357 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/756/06756837.pdf [firstpage_image] =>[orig_patent_app_number] => 10320641 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6759253 [patent_doc_number] => 20030122614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Amplifier with feedback compensation' [patent_app_type] => new [patent_app_number] => 10/319368 [patent_app_country] => US [patent_app_date] => 2002-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8513 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20030122614.pdf [firstpage_image] =>[orig_patent_app_number] => 10319368 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1267123 [patent_doc_number] => 06661277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-09 [patent_title] => 'Enhanced conductivity body biased PMOS driver' [patent_app_type] => B2 [patent_app_number] => 10/314309 [patent_app_country] => US [patent_app_date] => 2002-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3959 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/661/06661277.pdf [firstpage_image] =>[orig_patent_app_number] => 10314309 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6781499 [patent_doc_number] => 20030062946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Enhanced conductivity body biased PMOS driver' [patent_app_type] => new [patent_app_number] => 10/314308 [patent_app_country] => US [patent_app_date] => 2002-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3954 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20030062946.pdf [firstpage_image] =>[orig_patent_app_number] => 10314308 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 982775 [patent_doc_number] => 06927619 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-09 [patent_title] => 'Method and system for reducing leakage current in integrated circuits using adaptively adjusted source voltages' [patent_app_type] => utility [patent_app_number] => 10/313806 [patent_app_country] => US [patent_app_date] => 2002-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7584 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/927/06927619.pdf [firstpage_image] =>[orig_patent_app_number] => 10313806 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1194145 [patent_doc_number] => 06731155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-04 [patent_title] => 'Track and hold with dual pump circuit' [patent_app_type] => B2 [patent_app_number] => 10/308775 [patent_app_country] => US [patent_app_date] => 2002-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9103 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/731/06731155.pdf [firstpage_image] =>[orig_patent_app_number] => 10308775 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6657358 [patent_doc_number] => 20030133337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Semiconductor device and portable terminal equipment' [patent_app_type] => new [patent_app_number] => 10/300592 [patent_app_country] => US [patent_app_date] => 2002-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5409 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20030133337.pdf [firstpage_image] =>[orig_patent_app_number] => 10300592 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7146111 [patent_doc_number] => 20040169974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-02 [patent_title] => 'Semiconductor integrated circuit and its reset method' [patent_app_type] => new [patent_app_number] => 10/484904 [patent_app_country] => US [patent_app_date] => 2004-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4650 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20040169974.pdf [firstpage_image] =>[orig_patent_app_number] => 10484904 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6812132 [patent_doc_number] => 20030071682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-17 [patent_title] => 'Voltage-controlled capacitor' [patent_app_type] => new [patent_app_number] => 10/288388 [patent_app_country] => US [patent_app_date] => 2002-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 773 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20030071682.pdf [firstpage_image] =>[orig_patent_app_number] => 10288388 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1169544 [patent_doc_number] => 06759894 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-06 [patent_title] => 'Method and circuit for controlling fuse blow' [patent_app_type] => B2 [patent_app_number] => 10/284995 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3359 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/759/06759894.pdf [firstpage_image] =>[orig_patent_app_number] => 10284995 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6691236 [patent_doc_number] => 20030038668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-27 [patent_title] => 'Low power operation mechanism and method' [patent_app_type] => new [patent_app_number] => 10/270198 [patent_app_country] => US [patent_app_date] => 2002-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3597 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20030038668.pdf [firstpage_image] =>[orig_patent_app_number] => 10270198 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6799828 [patent_doc_number] => 20030094992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-22 [patent_title] => 'Electronic array having nodes and methods' [patent_app_type] => new [patent_app_number] => 10/271874 [patent_app_country] => US [patent_app_date] => 2002-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 13241 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20030094992.pdf [firstpage_image] =>[orig_patent_app_number] => 10271874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6837472 [patent_doc_number] => 20030034812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'POWER ON RESET CIRCUIT' [patent_app_type] => new [patent_app_number] => 10/268687 [patent_app_country] => US [patent_app_date] => 2002-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5341 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20030034812.pdf [firstpage_image] =>[orig_patent_app_number] => 10268687 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7623388 [patent_doc_number] => 06686777 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-03 [patent_title] => 'Phase detector having improved timing margins' [patent_app_type] => B1 [patent_app_number] => 10/268196 [patent_app_country] => US [patent_app_date] => 2002-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 43 [patent_no_of_words] => 8225 [patent_no_of_claims] => 65 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/686/06686777.pdf [firstpage_image] =>[orig_patent_app_number] => 10268196 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1013053 [patent_doc_number] => RE038734 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2005-05-17 [patent_title] => 'Semiconductor switching apparatus and method of controlling a semiconductor switching element' [patent_app_type] => reissue [patent_app_number] => 10/259859 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 8912 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/038/RE038734.pdf [firstpage_image] =>[orig_patent_app_number] => 10259859 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6649114 [patent_doc_number] => 20030076080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'Linear power conversion circuit' [patent_app_type] => new [patent_app_number] => 10/247921 [patent_app_country] => US [patent_app_date] => 2002-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4408 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20030076080.pdf [firstpage_image] =>[orig_patent_app_number] => 10247921 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1331842 [patent_doc_number] => 06600360 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-29 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => B2 [patent_app_number] => 10/247525 [patent_app_country] => US [patent_app_date] => 2002-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 29 [patent_no_of_words] => 12822 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/600/06600360.pdf [firstpage_image] =>[orig_patent_app_number] => 10247525 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7268185 [patent_doc_number] => 20040056703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'ACTIVE WELL-BIAS TRANSISTOR FOR PROGRAMMING A FUSE' [patent_app_type] => new [patent_app_number] => 10/247154 [patent_app_country] => US [patent_app_date] => 2002-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2033 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20040056703.pdf [firstpage_image] =>[orig_patent_app_number] => 10247154 [rel_patent_id] =>[rel_patent_doc_number] =>)