Search

Jeffery Shawn Zweizig

Examiner (ID: 12123, Phone: (571)272-1758 , Office: P/2842 )

Most Active Art Unit
2816
Art Unit(s)
2849, 2816, 2842, 2504
Total Applications
2645
Issued Applications
2451
Pending Applications
87
Abandoned Applications
136

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1267123 [patent_doc_number] => 06661277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-09 [patent_title] => 'Enhanced conductivity body biased PMOS driver' [patent_app_type] => B2 [patent_app_number] => 10/314309 [patent_app_country] => US [patent_app_date] => 2002-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3959 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/661/06661277.pdf [firstpage_image] =>[orig_patent_app_number] => 10314309 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/314309
Enhanced conductivity body biased PMOS driver Dec 8, 2002 Issued
Array ( [id] => 982775 [patent_doc_number] => 06927619 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-09 [patent_title] => 'Method and system for reducing leakage current in integrated circuits using adaptively adjusted source voltages' [patent_app_type] => utility [patent_app_number] => 10/313806 [patent_app_country] => US [patent_app_date] => 2002-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7584 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/927/06927619.pdf [firstpage_image] =>[orig_patent_app_number] => 10313806 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/313806
Method and system for reducing leakage current in integrated circuits using adaptively adjusted source voltages Dec 5, 2002 Issued
Array ( [id] => 1194145 [patent_doc_number] => 06731155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-04 [patent_title] => 'Track and hold with dual pump circuit' [patent_app_type] => B2 [patent_app_number] => 10/308775 [patent_app_country] => US [patent_app_date] => 2002-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9103 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/731/06731155.pdf [firstpage_image] =>[orig_patent_app_number] => 10308775 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/308775
Track and hold with dual pump circuit Dec 2, 2002 Issued
Array ( [id] => 6657358 [patent_doc_number] => 20030133337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Semiconductor device and portable terminal equipment' [patent_app_type] => new [patent_app_number] => 10/300592 [patent_app_country] => US [patent_app_date] => 2002-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5409 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20030133337.pdf [firstpage_image] =>[orig_patent_app_number] => 10300592 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/300592
Semiconductor device and portable terminal equipment Nov 20, 2002 Issued
Array ( [id] => 7146111 [patent_doc_number] => 20040169974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-02 [patent_title] => 'Semiconductor integrated circuit and its reset method' [patent_app_type] => new [patent_app_number] => 10/484904 [patent_app_country] => US [patent_app_date] => 2004-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4650 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20040169974.pdf [firstpage_image] =>[orig_patent_app_number] => 10484904 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/484904
Semiconductor integrated circuit and its reset method Nov 19, 2002 Issued
Array ( [id] => 6812132 [patent_doc_number] => 20030071682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-17 [patent_title] => 'Voltage-controlled capacitor' [patent_app_type] => new [patent_app_number] => 10/288388 [patent_app_country] => US [patent_app_date] => 2002-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 773 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20030071682.pdf [firstpage_image] =>[orig_patent_app_number] => 10288388 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/288388
Voltage-controlled capacitor Nov 4, 2002 Issued
Array ( [id] => 1169544 [patent_doc_number] => 06759894 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-06 [patent_title] => 'Method and circuit for controlling fuse blow' [patent_app_type] => B2 [patent_app_number] => 10/284995 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3359 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/759/06759894.pdf [firstpage_image] =>[orig_patent_app_number] => 10284995 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/284995
Method and circuit for controlling fuse blow Oct 30, 2002 Issued
Array ( [id] => 6691236 [patent_doc_number] => 20030038668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-27 [patent_title] => 'Low power operation mechanism and method' [patent_app_type] => new [patent_app_number] => 10/270198 [patent_app_country] => US [patent_app_date] => 2002-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3597 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20030038668.pdf [firstpage_image] =>[orig_patent_app_number] => 10270198 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/270198
Low power operation mechanism and method Oct 14, 2002 Issued
Array ( [id] => 6799828 [patent_doc_number] => 20030094992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-22 [patent_title] => 'Electronic array having nodes and methods' [patent_app_type] => new [patent_app_number] => 10/271874 [patent_app_country] => US [patent_app_date] => 2002-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 13241 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20030094992.pdf [firstpage_image] =>[orig_patent_app_number] => 10271874 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/271874
Electronic array having nodes and methods Oct 14, 2002 Issued
Array ( [id] => 6837472 [patent_doc_number] => 20030034812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'POWER ON RESET CIRCUIT' [patent_app_type] => new [patent_app_number] => 10/268687 [patent_app_country] => US [patent_app_date] => 2002-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5341 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20030034812.pdf [firstpage_image] =>[orig_patent_app_number] => 10268687 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/268687
Power on reset circuit Oct 10, 2002 Issued
Array ( [id] => 7623388 [patent_doc_number] => 06686777 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-03 [patent_title] => 'Phase detector having improved timing margins' [patent_app_type] => B1 [patent_app_number] => 10/268196 [patent_app_country] => US [patent_app_date] => 2002-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 43 [patent_no_of_words] => 8225 [patent_no_of_claims] => 65 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/686/06686777.pdf [firstpage_image] =>[orig_patent_app_number] => 10268196 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/268196
Phase detector having improved timing margins Oct 8, 2002 Issued
Array ( [id] => 1013053 [patent_doc_number] => RE038734 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2005-05-17 [patent_title] => 'Semiconductor switching apparatus and method of controlling a semiconductor switching element' [patent_app_type] => reissue [patent_app_number] => 10/259859 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 8912 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/038/RE038734.pdf [firstpage_image] =>[orig_patent_app_number] => 10259859 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/259859
Semiconductor switching apparatus and method of controlling a semiconductor switching element Sep 29, 2002 Issued
Array ( [id] => 6649114 [patent_doc_number] => 20030076080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'Linear power conversion circuit' [patent_app_type] => new [patent_app_number] => 10/247921 [patent_app_country] => US [patent_app_date] => 2002-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4408 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20030076080.pdf [firstpage_image] =>[orig_patent_app_number] => 10247921 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/247921
Linear power conversion circuit Sep 19, 2002 Issued
Array ( [id] => 1331842 [patent_doc_number] => 06600360 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-29 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => B2 [patent_app_number] => 10/247525 [patent_app_country] => US [patent_app_date] => 2002-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 29 [patent_no_of_words] => 12822 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/600/06600360.pdf [firstpage_image] =>[orig_patent_app_number] => 10247525 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/247525
Semiconductor integrated circuit Sep 19, 2002 Issued
Array ( [id] => 6764324 [patent_doc_number] => 20030098722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-29 [patent_title] => 'Low charge-dump transistor switch' [patent_app_type] => new [patent_app_number] => 10/247752 [patent_app_country] => US [patent_app_date] => 2002-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4027 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20030098722.pdf [firstpage_image] =>[orig_patent_app_number] => 10247752 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/247752
Low charge-dump transistor switch Sep 18, 2002 Issued
Array ( [id] => 7268185 [patent_doc_number] => 20040056703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'ACTIVE WELL-BIAS TRANSISTOR FOR PROGRAMMING A FUSE' [patent_app_type] => new [patent_app_number] => 10/247154 [patent_app_country] => US [patent_app_date] => 2002-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2033 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20040056703.pdf [firstpage_image] =>[orig_patent_app_number] => 10247154 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/247154
Active well-bias transistor for programming a fuse Sep 18, 2002 Issued
Array ( [id] => 7623367 [patent_doc_number] => 06686798 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-03 [patent_title] => 'Reference voltage circuit' [patent_app_type] => B2 [patent_app_number] => 10/246342 [patent_app_country] => US [patent_app_date] => 2002-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3377 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/686/06686798.pdf [firstpage_image] =>[orig_patent_app_number] => 10246342 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/246342
Reference voltage circuit Sep 17, 2002 Issued
Array ( [id] => 1249293 [patent_doc_number] => 06674317 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-06 [patent_title] => 'Output stage of a charge pump circuit providing relatively stable output voltage without voltage degradation' [patent_app_type] => B1 [patent_app_number] => 10/246275 [patent_app_country] => US [patent_app_date] => 2002-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2650 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/674/06674317.pdf [firstpage_image] =>[orig_patent_app_number] => 10246275 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/246275
Output stage of a charge pump circuit providing relatively stable output voltage without voltage degradation Sep 17, 2002 Issued
Array ( [id] => 1169575 [patent_doc_number] => 06759896 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-06 [patent_title] => 'Semiconductor integrated circuit and semiconductor memory having a voltage step-down circuit stepping external power supply voltage down to internal power supply voltage' [patent_app_type] => B2 [patent_app_number] => 10/246272 [patent_app_country] => US [patent_app_date] => 2002-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 8362 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/759/06759896.pdf [firstpage_image] =>[orig_patent_app_number] => 10246272 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/246272
Semiconductor integrated circuit and semiconductor memory having a voltage step-down circuit stepping external power supply voltage down to internal power supply voltage Sep 17, 2002 Issued
Array ( [id] => 7449341 [patent_doc_number] => 20040051582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'TRIMMER METHOD AND DEVICE FOR CIRCUITS' [patent_app_type] => new [patent_app_number] => 10/245390 [patent_app_country] => US [patent_app_date] => 2002-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4002 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20040051582.pdf [firstpage_image] =>[orig_patent_app_number] => 10245390 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/245390
Trimmer method and device for circuits Sep 17, 2002 Issued
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