Jeffery Shawn Zweizig

Array ( [id] => 1598502 [patent_doc_number] => 06492864 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-10 [patent_title] => 'Circuit configuration for low-power reference voltage generation' [patent_app_type] => B2 [patent_app_number] => 10/113420 [patent_app_country] => US [patent_app_date] => 2002-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2899 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/492/06492864.pdf [firstpage_image] =>[orig_patent_app_number] => 10113420 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1338430 [patent_doc_number] => 06597232 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-22 [patent_title] => 'Data storage having environmental communication module (ECM)' [patent_app_type] => B1 [patent_app_number] => 10/109614 [patent_app_country] => US [patent_app_date] => 2002-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 11565 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/597/06597232.pdf [firstpage_image] =>[orig_patent_app_number] => 10109614 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5783517 [patent_doc_number] => 20020158679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-31 [patent_title] => 'Voltage control circuit' [patent_app_type] => new [patent_app_number] => 10/108541 [patent_app_country] => US [patent_app_date] => 2002-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1947 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20020158679.pdf [firstpage_image] =>[orig_patent_app_number] => 10108541 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5902007 [patent_doc_number] => 20020140497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Voltage generating circuit and method' [patent_app_type] => new [patent_app_number] => 10/108276 [patent_app_country] => US [patent_app_date] => 2002-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5269 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20020140497.pdf [firstpage_image] =>[orig_patent_app_number] => 10108276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1383201 [patent_doc_number] => 06563369 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'Active current mirror circuit' [patent_app_type] => B1 [patent_app_number] => 10/106565 [patent_app_country] => US [patent_app_date] => 2002-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4329 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/563/06563369.pdf [firstpage_image] =>[orig_patent_app_number] => 10106565 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6045028 [patent_doc_number] => 20020167349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-14 [patent_title] => 'Adjustable temperature-compensated threshold circuit with trip-points exceeding the given supplies' [patent_app_type] => new [patent_app_number] => 10/106436 [patent_app_country] => US [patent_app_date] => 2002-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1122 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20020167349.pdf [firstpage_image] =>[orig_patent_app_number] => 10106436 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6154694 [patent_doc_number] => 20020145455 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-10 [patent_title] => 'Power detector for digital integrated circuits' [patent_app_type] => new [patent_app_number] => 10/063138 [patent_app_country] => US [patent_app_date] => 2002-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4068 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20020145455.pdf [firstpage_image] =>[orig_patent_app_number] => 10063138 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1383037 [patent_doc_number] => 06563361 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'Method and apparatus for a limiting amplifier with precise output limits' [patent_app_type] => B1 [patent_app_number] => 10/104654 [patent_app_country] => US [patent_app_date] => 2002-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4850 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/563/06563361.pdf [firstpage_image] =>[orig_patent_app_number] => 10104654 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6748426 [patent_doc_number] => 20030042946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-06 [patent_title] => 'Circuit to eliminate bus contention at chip power up' [patent_app_type] => new [patent_app_number] => 10/100051 [patent_app_country] => US [patent_app_date] => 2002-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2057 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20030042946.pdf [firstpage_image] =>[orig_patent_app_number] => 10100051 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6781501 [patent_doc_number] => 20030062948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => new [patent_app_number] => 10/098432 [patent_app_country] => US [patent_app_date] => 2002-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7094 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20030062948.pdf [firstpage_image] =>[orig_patent_app_number] => 10098432 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1207534 [patent_doc_number] => 06717457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-06 [patent_title] => 'Semiconductor device with temperature compensation circuit' [patent_app_type] => B2 [patent_app_number] => 10/098558 [patent_app_country] => US [patent_app_date] => 2002-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6482 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/717/06717457.pdf [firstpage_image] =>[orig_patent_app_number] => 10098558 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1322634 [patent_doc_number] => 06605973 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-12 [patent_title] => 'High voltage discharge circuit' [patent_app_type] => B1 [patent_app_number] => 10/099214 [patent_app_country] => US [patent_app_date] => 2002-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2315 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/605/06605973.pdf [firstpage_image] =>[orig_patent_app_number] => 10099214 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6748452 [patent_doc_number] => 20030042972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-06 [patent_title] => 'Semiconductor integrated circuit with function to start and stop supply of clock signal' [patent_app_type] => new [patent_app_number] => 10/097619 [patent_app_country] => US [patent_app_date] => 2002-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4867 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20030042972.pdf [firstpage_image] =>[orig_patent_app_number] => 10097619 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1410171 [patent_doc_number] => 06538490 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-25 [patent_title] => 'Offset compensation circuit and offset compensation method' [patent_app_type] => B2 [patent_app_number] => 10/097307 [patent_app_country] => US [patent_app_date] => 2002-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7593 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/538/06538490.pdf [firstpage_image] =>[orig_patent_app_number] => 10097307 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5840995 [patent_doc_number] => 20020130709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-19 [patent_title] => 'Pass device leakage current correction circuit for use in linear regulators' [patent_app_type] => new [patent_app_number] => 10/097976 [patent_app_country] => US [patent_app_date] => 2002-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1219 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20020130709.pdf [firstpage_image] =>[orig_patent_app_number] => 10097976 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6691241 [patent_doc_number] => 20030038673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-27 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/096426 [patent_app_country] => US [patent_app_date] => 2002-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6736 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20030038673.pdf [firstpage_image] =>[orig_patent_app_number] => 10096426 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6076787 [patent_doc_number] => 20020079952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-27 [patent_title] => 'SELF INITIALIZATION FOR CHARGE PUMPS' [patent_app_type] => new [patent_app_number] => 10/051696 [patent_app_country] => US [patent_app_date] => 2002-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4819 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20020079952.pdf [firstpage_image] =>[orig_patent_app_number] => 10051696 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6855059 [patent_doc_number] => 20030128560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'High voltage generation and regulation system for digital multilevel nonvolatile memory' [patent_app_type] => new [patent_app_number] => 10/044273 [patent_app_country] => US [patent_app_date] => 2002-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9445 [patent_no_of_claims] => 82 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20030128560.pdf [firstpage_image] =>[orig_patent_app_number] => 10044273 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1329465 [patent_doc_number] => 06603345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-05 [patent_title] => 'Semiconductor device with reduced leakage of current' [patent_app_type] => B2 [patent_app_number] => 10/033628 [patent_app_country] => US [patent_app_date] => 2001-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11556 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/603/06603345.pdf [firstpage_image] =>[orig_patent_app_number] => 10033628 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6285807 [patent_doc_number] => 20020053941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-09 [patent_title] => 'Transmission gate' [patent_app_type] => new [patent_app_number] => 10/029299 [patent_app_country] => US [patent_app_date] => 2001-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7713 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0053/20020053941.pdf [firstpage_image] =>[orig_patent_app_number] => 10029299 [rel_patent_id] =>[rel_patent_doc_number] =>)