Search

Jeffrey Donels

Examiner (ID: 8246, Phone: (571)272-2061 , Office: P/2837 )

Most Active Art Unit
2837
Art Unit(s)
2832, 3621, 2837, 2107
Total Applications
2703
Issued Applications
2321
Pending Applications
127
Abandoned Applications
255

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10294973 [patent_doc_number] => 20150179972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'ELECTRODE CONTACTS' [patent_app_type] => utility [patent_app_number] => 14/581193 [patent_app_country] => US [patent_app_date] => 2014-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3174 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14581193 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/581193
Electrode contacts Dec 22, 2014 Issued
Array ( [id] => 10371174 [patent_doc_number] => 20150256180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'FIELD PROGRAMMABLE GATE ARRAY AND SWITCH STRUCTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 14/581114 [patent_app_country] => US [patent_app_date] => 2014-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4524 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14581114 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/581114
FIELD PROGRAMMABLE GATE ARRAY AND SWITCH STRUCTURE THEREOF Dec 22, 2014 Abandoned
Array ( [id] => 11466913 [patent_doc_number] => 09583554 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-28 [patent_title] => 'Adjustable ground shielding circuitry' [patent_app_type] => utility [patent_app_number] => 14/581428 [patent_app_country] => US [patent_app_date] => 2014-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6158 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14581428 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/581428
Adjustable ground shielding circuitry Dec 22, 2014 Issued
Array ( [id] => 11096593 [patent_doc_number] => 20160293562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'POWER MODULE SUBSTRATE, METHOD OF PRODUCING SAME, AND POWER MODULE' [patent_app_type] => utility [patent_app_number] => 15/037186 [patent_app_country] => US [patent_app_date] => 2014-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8728 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15037186 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/037186
Power module substrate, method of producing same, and power module Dec 21, 2014 Issued
Array ( [id] => 10252141 [patent_doc_number] => 20150137137 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-21 [patent_title] => 'CURRENT APERTURE VERTICAL ELECTRON TRANSISTORS WITH AMMONIA MOLECULAR BEAM EPITAXY GROWN P-TYPE GALLIUM NITRIDE AS A CURRENT BLOCKING LAYER' [patent_app_type] => utility [patent_app_number] => 14/566443 [patent_app_country] => US [patent_app_date] => 2014-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5763 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14566443 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/566443
Current aperture vertical electron transistors with ammonia molecular beam epitaxy grown p-type gallium nitride as a current blocking layer Dec 9, 2014 Issued
Array ( [id] => 10294638 [patent_doc_number] => 20150179637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'Semiconductor Devices' [patent_app_type] => utility [patent_app_number] => 14/561357 [patent_app_country] => US [patent_app_date] => 2014-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 17799 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14561357 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/561357
Semiconductor devices Dec 4, 2014 Issued
Array ( [id] => 13291121 [patent_doc_number] => 10156748 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Matrix circuit substrate, display apparatus, and manufacturing method of matrix circuit substrate [patent_app_type] => utility [patent_app_number] => 15/037226 [patent_app_country] => US [patent_app_date] => 2014-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 8416 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15037226 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/037226
Matrix circuit substrate, display apparatus, and manufacturing method of matrix circuit substrate Nov 27, 2014 Issued
Array ( [id] => 10503178 [patent_doc_number] => 09231581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-05 [patent_title] => 'Method of operating a reverse conducting IGBT' [patent_app_type] => utility [patent_app_number] => 14/551632 [patent_app_country] => US [patent_app_date] => 2014-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 5463 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 329 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14551632 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/551632
Method of operating a reverse conducting IGBT Nov 23, 2014 Issued
Array ( [id] => 11028734 [patent_doc_number] => 20160225690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-04 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/916136 [patent_app_country] => US [patent_app_date] => 2014-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 19126 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14916136 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/916136
SEMICONDUCTOR DEVICE Aug 28, 2014 Abandoned
Array ( [id] => 9978092 [patent_doc_number] => 09024404 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-05-05 [patent_title] => 'Light sensors having dielectric optical coating filters' [patent_app_type] => utility [patent_app_number] => 14/447855 [patent_app_country] => US [patent_app_date] => 2014-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 33 [patent_no_of_words] => 8747 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14447855 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/447855
Light sensors having dielectric optical coating filters Jul 30, 2014 Issued
Array ( [id] => 13769919 [patent_doc_number] => 10177310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-08 [patent_title] => Amorphous metal alloy electrodes in non-volatile device applications [patent_app_type] => utility [patent_app_number] => 15/324691 [patent_app_country] => US [patent_app_date] => 2014-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 7544 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15324691 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/324691
Amorphous metal alloy electrodes in non-volatile device applications Jul 29, 2014 Issued
Array ( [id] => 12215097 [patent_doc_number] => 09911915 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-06 [patent_title] => 'Multiphase selectors' [patent_app_type] => utility [patent_app_number] => 15/318089 [patent_app_country] => US [patent_app_date] => 2014-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6366 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15318089 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/318089
Multiphase selectors Jul 28, 2014 Issued
Array ( [id] => 10919871 [patent_doc_number] => 20140322890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'POLISHING SYSTEMS AND METHODS FOR REMOVING CONDUCTIVE MATERIAL FROM MICROELECTRONIC SUBSTRATES' [patent_app_type] => utility [patent_app_number] => 14/323945 [patent_app_country] => US [patent_app_date] => 2014-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4745 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14323945 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/323945
Polishing systems and methods for removing conductive material from microelectronic substrates Jul 2, 2014 Issued
Array ( [id] => 10557057 [patent_doc_number] => 09281261 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-08 [patent_title] => 'Intelligent chip placement within a three-dimensional chip stack' [patent_app_type] => utility [patent_app_number] => 14/278006 [patent_app_country] => US [patent_app_date] => 2014-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10623 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 478 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14278006 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/278006
Intelligent chip placement within a three-dimensional chip stack May 14, 2014 Issued
Array ( [id] => 10073785 [patent_doc_number] => 09112153 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-18 [patent_title] => 'Surface modification' [patent_app_type] => utility [patent_app_number] => 14/250327 [patent_app_country] => US [patent_app_date] => 2014-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 5185 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14250327 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/250327
Surface modification Apr 9, 2014 Issued
Array ( [id] => 10681491 [patent_doc_number] => 20160027636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-28 [patent_title] => 'LARGE-AREA, LATERALLY-GROWN EPITAXIAL SEMICONDUCTOR LAYERS' [patent_app_type] => utility [patent_app_number] => 14/776634 [patent_app_country] => US [patent_app_date] => 2014-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9985 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14776634 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/776634
Large-area, laterally-grown epitaxial semiconductor layers Mar 13, 2014 Issued
Array ( [id] => 11087674 [patent_doc_number] => 20160284642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'PACKAGE ON PACKAGE ARCHITECTURE AND METHOD FOR MAKING' [patent_app_type] => utility [patent_app_number] => 15/037276 [patent_app_country] => US [patent_app_date] => 2013-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9680 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15037276 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/037276
Package on package architecture and method for making Dec 22, 2013 Issued
Array ( [id] => 10294779 [patent_doc_number] => 20150179778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'SOI LATERAL BIPOLAR TRANSISTORS HAVING SURROUNDING EXTRINSIC BASE PORTIONS' [patent_app_type] => utility [patent_app_number] => 14/134611 [patent_app_country] => US [patent_app_date] => 2013-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11520 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14134611 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/134611
SOI lateral bipolar transistors having surrounding extrinsic base portions Dec 18, 2013 Issued
Array ( [id] => 11180723 [patent_doc_number] => 09412719 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-09 [patent_title] => '3DIC interconnect apparatus and method' [patent_app_type] => utility [patent_app_number] => 14/135103 [patent_app_country] => US [patent_app_date] => 2013-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5122 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14135103 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/135103
3DIC interconnect apparatus and method Dec 18, 2013 Issued
Array ( [id] => 11831666 [patent_doc_number] => 09728415 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-08 [patent_title] => 'Semiconductor device and method of wafer thinning involving edge trimming and CMP' [patent_app_type] => utility [patent_app_number] => 14/134907 [patent_app_country] => US [patent_app_date] => 2013-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 32 [patent_no_of_words] => 7400 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14134907 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/134907
Semiconductor device and method of wafer thinning involving edge trimming and CMP Dec 18, 2013 Issued
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