Search

Jeffrey E. Madonna

Examiner (ID: 3874, Phone: (571)270-7755 , Office: P/2872 )

Most Active Art Unit
2872
Art Unit(s)
2872
Total Applications
250
Issued Applications
179
Pending Applications
0
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14616491 [patent_doc_number] => 10360949 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-23 [patent_title] => Apparatuses and methods for storing a data value in a sensing circuitry element [patent_app_type] => utility [patent_app_number] => 15/972783 [patent_app_country] => US [patent_app_date] => 2018-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 10814 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15972783 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/972783
Apparatuses and methods for storing a data value in a sensing circuitry element May 6, 2018 Issued
Array ( [id] => 13613041 [patent_doc_number] => 20180358070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => MAGNETIC MEMORY DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/965830 [patent_app_country] => US [patent_app_date] => 2018-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5682 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15965830 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/965830
Magnetic memory device and method of fabricating the same Apr 26, 2018 Issued
Array ( [id] => 15233751 [patent_doc_number] => 10504604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-10 [patent_title] => Systems and methods to test a memory device [patent_app_type] => utility [patent_app_number] => 15/965456 [patent_app_country] => US [patent_app_date] => 2018-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 10262 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15965456 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/965456
Systems and methods to test a memory device Apr 26, 2018 Issued
Array ( [id] => 13542769 [patent_doc_number] => 20180322931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => NONVOLATILE MEMORY APPARATUS AND REFRESH METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/959304 [patent_app_country] => US [patent_app_date] => 2018-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4623 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15959304 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/959304
Nonvolatile memory apparatus and refresh method thereof Apr 22, 2018 Issued
Array ( [id] => 15014769 [patent_doc_number] => 10453540 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Method and apparatus to prioritize read response time in a power-limited storage device [patent_app_type] => utility [patent_app_number] => 15/959538 [patent_app_country] => US [patent_app_date] => 2018-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5689 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15959538 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/959538
Method and apparatus to prioritize read response time in a power-limited storage device Apr 22, 2018 Issued
Array ( [id] => 13847421 [patent_doc_number] => 20190027195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-24 [patent_title] => NONVOLATILE MEMORY DEVICE AND OPERATING METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 15/959344 [patent_app_country] => US [patent_app_date] => 2018-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8473 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15959344 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/959344
Nonvolatile memory device and operating method of the same Apr 22, 2018 Issued
Array ( [id] => 14078811 [patent_doc_number] => 20190088293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => NONVOLATILE MEMORY DEVICE, DATA STORAGE DEVICE INCLUDING THE SAME AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/958912 [patent_app_country] => US [patent_app_date] => 2018-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6521 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15958912 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/958912
Nonvolatile memory device, data storage device including the same and operating method thereof Apr 19, 2018 Issued
Array ( [id] => 13228421 [patent_doc_number] => 10127989 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-13 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/956401 [patent_app_country] => US [patent_app_date] => 2018-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 12649 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15956401 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/956401
Semiconductor device Apr 17, 2018 Issued
Array ( [id] => 14999683 [patent_doc_number] => 20190318799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-17 [patent_title] => LEVERAGING CHIP VARIABILITY [patent_app_type] => utility [patent_app_number] => 15/956061 [patent_app_country] => US [patent_app_date] => 2018-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4788 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15956061 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/956061
Leveraging chip variability Apr 17, 2018 Issued
Array ( [id] => 13334449 [patent_doc_number] => 20180218762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-02 [patent_title] => MEMORY SYSTEM AND DATA TRANSMISSION METHOD [patent_app_type] => utility [patent_app_number] => 15/937518 [patent_app_country] => US [patent_app_date] => 2018-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30908 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15937518 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/937518
Memory system and data transmission method Mar 26, 2018 Issued
Array ( [id] => 14644007 [patent_doc_number] => 10366751 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-30 [patent_title] => Resistance memory cell [patent_app_type] => utility [patent_app_number] => 15/924086 [patent_app_country] => US [patent_app_date] => 2018-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 7699 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15924086 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/924086
Resistance memory cell Mar 15, 2018 Issued
Array ( [id] => 14842575 [patent_doc_number] => 20190279688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => Power Management Integrated Circuit Load Switch Driver with Dynamic Biasing [patent_app_type] => utility [patent_app_number] => 15/919020 [patent_app_country] => US [patent_app_date] => 2018-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4251 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15919020 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/919020
Power management integrated circuit load switch driver with dynamic biasing Mar 11, 2018 Issued
Array ( [id] => 14800745 [patent_doc_number] => 10403381 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Magnetic memory device [patent_app_type] => utility [patent_app_number] => 15/918344 [patent_app_country] => US [patent_app_date] => 2018-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 8398 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15918344 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/918344
Magnetic memory device Mar 11, 2018 Issued
Array ( [id] => 14316513 [patent_doc_number] => 20190147960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => BIAS SCHEME FOR WORD PROGRAMMING IN NON-VOLATILE MEMORY AND INHIBIT DISTURB REDUCTION [patent_app_type] => utility [patent_app_number] => 15/918704 [patent_app_country] => US [patent_app_date] => 2018-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8616 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15918704 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/918704
Bias scheme for word programming in non-volatile memory and inhibit disturb reduction Mar 11, 2018 Issued
Array ( [id] => 14190729 [patent_doc_number] => 20190115070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/909404 [patent_app_country] => US [patent_app_date] => 2018-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12586 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15909404 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/909404
Semiconductor memory device Feb 28, 2018 Issued
Array ( [id] => 15984197 [patent_doc_number] => 10672433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 15/909502 [patent_app_country] => US [patent_app_date] => 2018-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 41 [patent_no_of_words] => 17452 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15909502 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/909502
Semiconductor memory device Feb 28, 2018 Issued
Array ( [id] => 13434671 [patent_doc_number] => 20180268878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-20 [patent_title] => NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/909448 [patent_app_country] => US [patent_app_date] => 2018-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6940 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15909448 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/909448
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE Feb 28, 2018 Abandoned
Array ( [id] => 13581495 [patent_doc_number] => 20180342296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-29 [patent_title] => METHOD FOR WRITING, READING AND ERASING DATA OF PHASE CHANGE MEMORY APPARATUS [patent_app_type] => utility [patent_app_number] => 15/887124 [patent_app_country] => US [patent_app_date] => 2018-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4379 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15887124 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/887124
Method for writing, reading and erasing data of phase change memory apparatus Feb 1, 2018 Issued
Array ( [id] => 14285471 [patent_doc_number] => 20190140020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => MAGNETIC DETECTION CIRCUIT, MRAM AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/875140 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7417 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15875140 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/875140
Magnetic detection circuit, MRAM and operation method thereof Jan 18, 2018 Issued
Array ( [id] => 14630887 [patent_doc_number] => 20190228812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => BIAS-CONTROLLED BIT-LINE SENSING SCHEME FOR EDRAM [patent_app_type] => utility [patent_app_number] => 15/875052 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5578 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15875052 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/875052
Bias-controlled bit-line sensing scheme for eDRAM Jan 18, 2018 Issued
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