Search

Jeffrey E. Madonna

Examiner (ID: 3874, Phone: (571)270-7755 , Office: P/2872 )

Most Active Art Unit
2872
Art Unit(s)
2872
Total Applications
250
Issued Applications
179
Pending Applications
0
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12154494 [patent_doc_number] => 20180025758 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'APPARATUSES AND METHODS FOR STORING A DATA VALUE IN A SENSING CIRCUITRY ELEMENT' [patent_app_type] => utility [patent_app_number] => 15/693064 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11378 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15693064 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/693064
Apparatuses and methods for storing a data value in a sensing circuitry element Aug 30, 2017 Issued
Array ( [id] => 15791045 [patent_doc_number] => 10629251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-21 [patent_title] => Semiconductor memory system and operating method thereof [patent_app_type] => utility [patent_app_number] => 15/690519 [patent_app_country] => US [patent_app_date] => 2017-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8381 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15690519 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/690519
Semiconductor memory system and operating method thereof Aug 29, 2017 Issued
Array ( [id] => 14603063 [patent_doc_number] => 10354725 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Method for rewriting semiconductor storage device and the semiconductor storage device [patent_app_type] => utility [patent_app_number] => 15/688161 [patent_app_country] => US [patent_app_date] => 2017-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 37 [patent_no_of_words] => 12827 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 496 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15688161 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/688161
Method for rewriting semiconductor storage device and the semiconductor storage device Aug 27, 2017 Issued
Array ( [id] => 14984559 [patent_doc_number] => 10446199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-15 [patent_title] => Semiconductor device and semiconductor system [patent_app_type] => utility [patent_app_number] => 15/684228 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9092 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684228 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/684228
Semiconductor device and semiconductor system Aug 22, 2017 Issued
Array ( [id] => 14366437 [patent_doc_number] => 10304530 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-28 [patent_title] => Per-pin compact reference voltage generator [patent_app_type] => utility [patent_app_number] => 15/684594 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6069 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684594 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/684594
Per-pin compact reference voltage generator Aug 22, 2017 Issued
Array ( [id] => 13995205 [patent_doc_number] => 20190066760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => DRAM AND METHOD FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/684384 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684384 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/684384
DRAM AND METHOD FOR OPERATING THE SAME Aug 22, 2017 Abandoned
Array ( [id] => 14984627 [patent_doc_number] => 10446233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-15 [patent_title] => Sense-line muxing scheme [patent_app_type] => utility [patent_app_number] => 15/684492 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4231 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684492 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/684492
Sense-line muxing scheme Aug 22, 2017 Issued
Array ( [id] => 12095309 [patent_doc_number] => 20170352402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-07 [patent_title] => 'TIMING CONTROL CIRCUIT SHARED BY A PLURALITY OF BANKS' [patent_app_type] => utility [patent_app_number] => 15/682775 [patent_app_country] => US [patent_app_date] => 2017-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6376 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15682775 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/682775
Timing control circuit shared by a plurality of banks Aug 21, 2017 Issued
Array ( [id] => 12095312 [patent_doc_number] => 20170352405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-07 [patent_title] => 'SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/683449 [patent_app_country] => US [patent_app_date] => 2017-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6768 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15683449 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/683449
Semiconductor device and semiconductor system Aug 21, 2017 Issued
Array ( [id] => 14671533 [patent_doc_number] => 10373681 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Methods and apparatuses having a voltage generator with an adjustable voltage drop for representing a voltage drop of a memory cell and/or a current mirror circuit and replica circuit [patent_app_type] => utility [patent_app_number] => 15/670920 [patent_app_country] => US [patent_app_date] => 2017-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8761 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15670920 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/670920
Methods and apparatuses having a voltage generator with an adjustable voltage drop for representing a voltage drop of a memory cell and/or a current mirror circuit and replica circuit Aug 6, 2017 Issued
Array ( [id] => 12188404 [patent_doc_number] => 20180047340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-15 [patent_title] => 'DISPLAY DRIVER, ELECTRO-OPTICAL DEVICE, AND ELECTRONIC APPARATUS' [patent_app_type] => utility [patent_app_number] => 15/665704 [patent_app_country] => US [patent_app_date] => 2017-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13374 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15665704 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/665704
Display driver, electro-optical device, and electronic apparatus Jul 31, 2017 Issued
Array ( [id] => 13270813 [patent_doc_number] => 10147493 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-04 [patent_title] => System on-chip (SoC) device with dedicated clock generator for memory banks [patent_app_type] => utility [patent_app_number] => 15/665988 [patent_app_country] => US [patent_app_date] => 2017-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4908 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15665988 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/665988
System on-chip (SoC) device with dedicated clock generator for memory banks Jul 31, 2017 Issued
Array ( [id] => 14429211 [patent_doc_number] => 10319419 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Semiconductor memory device, and signal line layout structure thereof [patent_app_type] => utility [patent_app_number] => 15/665484 [patent_app_country] => US [patent_app_date] => 2017-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4780 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15665484 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/665484
Semiconductor memory device, and signal line layout structure thereof Jul 31, 2017 Issued
Array ( [id] => 12026714 [patent_doc_number] => 20170316813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'MAGNETIC MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/655212 [patent_app_country] => US [patent_app_date] => 2017-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8649 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15655212 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/655212
Spin orbit torque magnetic memory device Jul 19, 2017 Issued
Array ( [id] => 13282845 [patent_doc_number] => 10153013 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-11 [patent_title] => Data output buffer [patent_app_type] => utility [patent_app_number] => 15/645012 [patent_app_country] => US [patent_app_date] => 2017-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15645012 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/645012
Data output buffer Jul 9, 2017 Issued
Array ( [id] => 12649707 [patent_doc_number] => 20180108400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/641844 [patent_app_country] => US [patent_app_date] => 2017-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6113 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15641844 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/641844
Memory device and operating method thereof Jul 4, 2017 Issued
Array ( [id] => 13799555 [patent_doc_number] => 20190013316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => GATED DIODE MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 15/641828 [patent_app_country] => US [patent_app_date] => 2017-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9068 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15641828 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/641828
Gated diode memory cells Jul 4, 2017 Issued
Array ( [id] => 11974418 [patent_doc_number] => 20170278572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-28 [patent_title] => 'Devices Including Memory Arrays, Row Decoder Circuitries and Column Decoder Circuitries' [patent_app_type] => utility [patent_app_number] => 15/615652 [patent_app_country] => US [patent_app_date] => 2017-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6500 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15615652 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/615652
Devices including memory arrays, row decoder circuitries and column decoder circuitries Jun 5, 2017 Issued
Array ( [id] => 13694759 [patent_doc_number] => 20170358334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-14 [patent_title] => MEMORY DEVICE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 15/613508 [patent_app_country] => US [patent_app_date] => 2017-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16076 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15613508 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/613508
Memory device and semiconductor device including the same Jun 4, 2017 Issued
Array ( [id] => 12095339 [patent_doc_number] => 20170352432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-07 [patent_title] => 'E-FUSE DEVICE AND ARRAY THEREOF' [patent_app_type] => utility [patent_app_number] => 15/614154 [patent_app_country] => US [patent_app_date] => 2017-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6208 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15614154 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/614154
E-fuse device and array thereof Jun 4, 2017 Issued
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