Search

Jeffrey E. Madonna

Examiner (ID: 3874, Phone: (571)270-7755 , Office: P/2872 )

Most Active Art Unit
2872
Art Unit(s)
2872
Total Applications
250
Issued Applications
179
Pending Applications
0
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14706605 [patent_doc_number] => 10381060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => High-speed, low power spin-orbit torque (SOT) assisted spin-transfer torque magnetic random access memory (STT-MRAM) bit cell array [patent_app_type] => utility [patent_app_number] => 15/247791 [patent_app_country] => US [patent_app_date] => 2016-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12403 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15247791 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/247791
High-speed, low power spin-orbit torque (SOT) assisted spin-transfer torque magnetic random access memory (STT-MRAM) bit cell array Aug 24, 2016 Issued
Array ( [id] => 11710243 [patent_doc_number] => 20170178742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-22 [patent_title] => 'Self-Latch Sense Timing in a One-Time-Programmable Memory Architecture' [patent_app_type] => utility [patent_app_number] => 15/247352 [patent_app_country] => US [patent_app_date] => 2016-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9267 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15247352 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/247352
Self-latch sense timing in a one-time-programmable memory architecture Aug 24, 2016 Issued
Array ( [id] => 11502572 [patent_doc_number] => 20170076757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'ONE-TIME PROGRAMMABLE MEMORY ARRAY HAVING SMALL CHIP AREA' [patent_app_type] => utility [patent_app_number] => 15/246555 [patent_app_country] => US [patent_app_date] => 2016-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6760 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15246555 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/246555
One-time programmable memory array having small chip area Aug 24, 2016 Issued
Array ( [id] => 11701576 [patent_doc_number] => 09691499 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-06-27 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 15/246805 [patent_app_country] => US [patent_app_date] => 2016-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8269 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15246805 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/246805
Semiconductor memory device Aug 24, 2016 Issued
Array ( [id] => 11839824 [patent_doc_number] => 20170221544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-03 [patent_title] => 'MEMORY INTERFACE CIRCUIT HAVING SIGNAL DETECTOR FOR DETECTING CLOCK SIGNAL' [patent_app_type] => utility [patent_app_number] => 15/247870 [patent_app_country] => US [patent_app_date] => 2016-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2078 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15247870 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/247870
Memory interface circuit having signal detector for detecting clock signal Aug 24, 2016 Issued
Array ( [id] => 11339377 [patent_doc_number] => 20160365133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-15 [patent_title] => 'NON-VOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/245752 [patent_app_country] => US [patent_app_date] => 2016-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13510 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15245752 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/245752
Non-volatile memory device Aug 23, 2016 Issued
Array ( [id] => 13056635 [patent_doc_number] => 10049713 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-14 [patent_title] => Full bias sensing in a memory array [patent_app_type] => utility [patent_app_number] => 15/246249 [patent_app_country] => US [patent_app_date] => 2016-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 16585 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15246249 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/246249
Full bias sensing in a memory array Aug 23, 2016 Issued
Array ( [id] => 11502593 [patent_doc_number] => 20170076778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'TIMING CONTROL CIRCUIT SHARED BY A PLURALITY OF BANKS' [patent_app_type] => utility [patent_app_number] => 15/245727 [patent_app_country] => US [patent_app_date] => 2016-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6353 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15245727 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/245727
Timing control circuit shared by a plurality of banks Aug 23, 2016 Issued
Array ( [id] => 11532377 [patent_doc_number] => 20170092356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-30 [patent_title] => 'DEVICES AND METHODS FOR SELECTING A FORMING VOLTAGE FOR A RESISTIVE RANDOM-ACCESS MEMORY' [patent_app_type] => utility [patent_app_number] => 15/244308 [patent_app_country] => US [patent_app_date] => 2016-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6655 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15244308 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/244308
Devices and methods for selecting a forming voltage for a resistive random-access memory Aug 22, 2016 Issued
Array ( [id] => 13845523 [patent_doc_number] => 20190026246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-24 [patent_title] => ON-CHIP DATA PARTITIONING READ-WRITE METHOD, SYSTEM, AND DEVICE [patent_app_type] => utility [patent_app_number] => 16/071458 [patent_app_country] => US [patent_app_date] => 2016-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4536 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16071458 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/071458
On-chip data partitioning read-write method, system, and device Aug 8, 2016 Issued
Array ( [id] => 12101885 [patent_doc_number] => 09858983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-02 [patent_title] => 'Memory device having latency control circuit for controlling data write and read latency' [patent_app_type] => utility [patent_app_number] => 15/220744 [patent_app_country] => US [patent_app_date] => 2016-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8458 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15220744 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/220744
Memory device having latency control circuit for controlling data write and read latency Jul 26, 2016 Issued
Array ( [id] => 11564491 [patent_doc_number] => 09627083 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-18 [patent_title] => 'Nonvolatile memory devices relating to operation ranges' [patent_app_type] => utility [patent_app_number] => 15/219906 [patent_app_country] => US [patent_app_date] => 2016-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11416 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15219906 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/219906
Nonvolatile memory devices relating to operation ranges Jul 25, 2016 Issued
Array ( [id] => 11615284 [patent_doc_number] => 09653145 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-16 [patent_title] => 'Semiconductor devices and semiconductor systems including the same' [patent_app_type] => utility [patent_app_number] => 15/218544 [patent_app_country] => US [patent_app_date] => 2016-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6557 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15218544 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/218544
Semiconductor devices and semiconductor systems including the same Jul 24, 2016 Issued
Array ( [id] => 12174645 [patent_doc_number] => 09892793 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-02-13 [patent_title] => 'Systems and methods for programming data to storage devices' [patent_app_type] => utility [patent_app_number] => 15/219220 [patent_app_country] => US [patent_app_date] => 2016-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5508 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15219220 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/219220
Systems and methods for programming data to storage devices Jul 24, 2016 Issued
Array ( [id] => 11897926 [patent_doc_number] => 09767864 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-09-19 [patent_title] => 'Apparatuses and methods for storing a data value in a sensing circuitry element' [patent_app_type] => utility [patent_app_number] => 15/216256 [patent_app_country] => US [patent_app_date] => 2016-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 11428 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15216256 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/216256
Apparatuses and methods for storing a data value in a sensing circuitry element Jul 20, 2016 Issued
Array ( [id] => 11925402 [patent_doc_number] => 09792987 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-10-17 [patent_title] => 'Resistive random access memory device' [patent_app_type] => utility [patent_app_number] => 15/216520 [patent_app_country] => US [patent_app_date] => 2016-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10659 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15216520 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/216520
Resistive random access memory device Jul 20, 2016 Issued
Array ( [id] => 12416262 [patent_doc_number] => 09972367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-15 [patent_title] => Shifting data in sensing circuitry [patent_app_type] => utility [patent_app_number] => 15/216440 [patent_app_country] => US [patent_app_date] => 2016-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8108 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15216440 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/216440
Shifting data in sensing circuitry Jul 20, 2016 Issued
Array ( [id] => 11904102 [patent_doc_number] => 09773541 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-09-26 [patent_title] => 'Semiconductor device and semiconductor system' [patent_app_type] => utility [patent_app_number] => 15/214578 [patent_app_country] => US [patent_app_date] => 2016-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6749 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15214578 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/214578
Semiconductor device and semiconductor system Jul 19, 2016 Issued
Array ( [id] => 11063502 [patent_doc_number] => 20160260464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS' [patent_app_type] => utility [patent_app_number] => 15/156919 [patent_app_country] => US [patent_app_date] => 2016-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7772 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15156919 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/156919
Semiconductor memory apparatus May 16, 2016 Issued
Array ( [id] => 11869282 [patent_doc_number] => 20170236567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'SYSTEMS AND METHODS FOR INDIVIDUALLY CONFIGURING DYNAMIC RANDOM ACCESS MEMORIES SHARING A COMMON COMMAND ACCESS BUS' [patent_app_type] => utility [patent_app_number] => 15/142316 [patent_app_country] => US [patent_app_date] => 2016-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9498 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15142316 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/142316
Systems and methods for individually configuring dynamic random access memories sharing a common command access bus Apr 28, 2016 Issued
Menu