Jeffrey E Russel
Examiner (ID: 7840, Phone: (571)272-0969 , Office: P/1675 )
Most Active Art Unit | 1654 |
Art Unit(s) | 1103, 1815, 1653, 1654, 1809, 1811, 2899, 1675, 1621 |
Total Applications | 3490 |
Issued Applications | 2338 |
Pending Applications | 315 |
Abandoned Applications | 837 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 7962149
[patent_doc_number] => 06681355
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-01-20
[patent_title] => 'Analog boundary scan compliant integrated circuit system'
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[patent_app_number] => 09/538260
[patent_app_country] => US
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Array
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[patent_issue_date] => 2003-05-20
[patent_title] => 'Method and apparatus for host-based validating of data transferred between a device and a host'
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Array
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[patent_issue_date] => 2003-10-21
[patent_title] => 'Clock adjusting method and circuit device'
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Array
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[patent_title] => 'Test bus architecture'
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Array
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Array
(
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[patent_issue_date] => 2003-07-22
[patent_title] => 'Method and apparatus for testing an integrated circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/513867 | Method and apparatus for testing an integrated circuit | Feb 27, 2000 | Issued |
09/486468 | DEFINING QUALITY OF TRANSMISSION IN A TRANSMISSION SYSTEM | Feb 27, 2000 | Abandoned |
Array
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Array
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[patent_title] => 'Reed-Solomon decoding apparatus and control method therefor'
[patent_app_type] => B1
[patent_app_number] => 09/457727
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Array
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[id] => 1337682
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Array
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[patent_title] => 'Semiconductor integrated circuit device with fault analysis function'
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Array
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Array
(
[id] => 1407814
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Array
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Array
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Array
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Array
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Array
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