Jeffrey E Russel
Examiner (ID: 7840, Phone: (571)272-0969 , Office: P/1675 )
Most Active Art Unit | 1654 |
Art Unit(s) | 1103, 1815, 1653, 1654, 1809, 1811, 2899, 1675, 1621 |
Total Applications | 3490 |
Issued Applications | 2338 |
Pending Applications | 315 |
Abandoned Applications | 837 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 1362103
[patent_doc_number] => 06587976
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[patent_title] => 'Semiconductor device tester for measuring skew between output pins of a semiconductor device'
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[patent_app_number] => 09/454339
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Array
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[patent_doc_number] => 06412088
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[patent_issue_date] => 2002-06-25
[patent_title] => 'Method and apparatus for using block reread'
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Array
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[patent_issue_date] => 2003-04-01
[patent_title] => 'System and method to facilitate flexible control of bus drivers during scan test operations'
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Array
(
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[patent_issue_date] => 2003-02-11
[patent_title] => 'Method and apparatus for testing MR head instability using a criterion that removes normal head fluctuation from consideration'
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[patent_app_number] => 09/452651
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Array
(
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[patent_title] => 'Method and system for negotiation of the highest common link rate among nodes of a fibre channel arbitrated loop'
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Array
(
[id] => 1485224
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[patent_title] => 'Two stage SRandom interleaver'
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[patent_app_number] => 09/378281
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Array
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[patent_title] => 'Error detection and correction system for use with dual-pulse output metering devices'
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[patent_app_number] => 09/376844
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/376844 | Error detection and correction system for use with dual-pulse output metering devices | Aug 17, 1999 | Issued |
Array
(
[id] => 1585058
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[patent_issue_date] => 2002-09-10
[patent_title] => 'Test and characterization of source synchronous AC timing specifications by trace length modulation of accurately controlled interconnect topology of the test unit interface'
[patent_app_type] => B1
[patent_app_number] => 09/372654
[patent_app_country] => US
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[pdf_file] => patents/06/449/06449742.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/372654 | Test and characterization of source synchronous AC timing specifications by trace length modulation of accurately controlled interconnect topology of the test unit interface | Aug 10, 1999 | Issued |
Array
(
[id] => 1412632
[patent_doc_number] => 06553529
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[patent_issue_date] => 2003-04-22
[patent_title] => 'Low cost timing system for highly accurate multi-modal semiconductor testing'
[patent_app_type] => B1
[patent_app_number] => 09/360215
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/360215 | Low cost timing system for highly accurate multi-modal semiconductor testing | Jul 22, 1999 | Issued |
Array
(
[id] => 1553889
[patent_doc_number] => 06347390
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[patent_issue_date] => 2002-02-12
[patent_title] => 'Data encoding method and device, data decoding method and device, and data supply medium'
[patent_app_type] => B1
[patent_app_number] => 09/354240
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Array
(
[id] => 1407643
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[patent_country] => US
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[patent_issue_date] => 2003-05-06
[patent_title] => 'Soft error detection for digital signal processors'
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[patent_app_number] => 09/350316
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Array
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[id] => 1506106
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[patent_title] => 'Receiver initiated recovery algorithm (RIRA) for the layer 2 tunneling protocol (L2TP)'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/350431 | Receiver initiated recovery algorithm (RIRA) for the layer 2 tunneling protocol (L2TP) | Jul 7, 1999 | Issued |
Array
(
[id] => 1258661
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[patent_title] => 'Coding device and communication system using the same'
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Array
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Array
(
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[patent_title] => 'Parallel input output combined system for producing error correction code redundancy symbols and error syndromes'
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Array
(
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[patent_title] => 'System for multicast communications in packet switched networks'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/329101 | System for multicast communications in packet switched networks | Jun 8, 1999 | Issued |
Array
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