Search

Jeffrey E Russel

Examiner (ID: 7840, Phone: (571)272-0969 , Office: P/1675 )

Most Active Art Unit
1654
Art Unit(s)
1103, 1815, 1653, 1654, 1809, 1811, 2899, 1675, 1621
Total Applications
3490
Issued Applications
2338
Pending Applications
315
Abandoned Applications
837

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1362103 [patent_doc_number] => 06587976 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-01 [patent_title] => 'Semiconductor device tester for measuring skew between output pins of a semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/454339 [patent_app_country] => US [patent_app_date] => 1999-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5948 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/587/06587976.pdf [firstpage_image] =>[orig_patent_app_number] => 09454339 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/454339
Semiconductor device tester for measuring skew between output pins of a semiconductor device Dec 2, 1999 Issued
Array ( [id] => 1539400 [patent_doc_number] => 06412088 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-25 [patent_title] => 'Method and apparatus for using block reread' [patent_app_type] => B1 [patent_app_number] => 09/453164 [patent_app_country] => US [patent_app_date] => 1999-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1943 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/412/06412088.pdf [firstpage_image] =>[orig_patent_app_number] => 09453164 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/453164
Method and apparatus for using block reread Dec 1, 1999 Issued
Array ( [id] => 1421747 [patent_doc_number] => 06543018 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-01 [patent_title] => 'System and method to facilitate flexible control of bus drivers during scan test operations' [patent_app_type] => B1 [patent_app_number] => 09/454244 [patent_app_country] => US [patent_app_date] => 1999-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6726 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/543/06543018.pdf [firstpage_image] =>[orig_patent_app_number] => 09454244 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/454244
System and method to facilitate flexible control of bus drivers during scan test operations Dec 1, 1999 Issued
Array ( [id] => 1427132 [patent_doc_number] => 06519108 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-11 [patent_title] => 'Method and apparatus for testing MR head instability using a criterion that removes normal head fluctuation from consideration' [patent_app_type] => B2 [patent_app_number] => 09/452651 [patent_app_country] => US [patent_app_date] => 1999-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2497 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/519/06519108.pdf [firstpage_image] =>[orig_patent_app_number] => 09452651 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/452651
Method and apparatus for testing MR head instability using a criterion that removes normal head fluctuation from consideration Nov 30, 1999 Issued
Array ( [id] => 7646349 [patent_doc_number] => 06477171 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-05 [patent_title] => 'Method and system for negotiation of the highest common link rate among nodes of a fibre channel arbitrated loop' [patent_app_type] => B1 [patent_app_number] => 09/452618 [patent_app_country] => US [patent_app_date] => 1999-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5546 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/477/06477171.pdf [firstpage_image] =>[orig_patent_app_number] => 09452618 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/452618
Method and system for negotiation of the highest common link rate among nodes of a fibre channel arbitrated loop Nov 30, 1999 Issued
Array ( [id] => 1485224 [patent_doc_number] => 06453442 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Two stage SRandom interleaver' [patent_app_type] => B1 [patent_app_number] => 09/378281 [patent_app_country] => US [patent_app_date] => 1999-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3523 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/453/06453442.pdf [firstpage_image] =>[orig_patent_app_number] => 09378281 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/378281
Two stage SRandom interleaver Aug 19, 1999 Issued
Array ( [id] => 1419416 [patent_doc_number] => 06542832 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-01 [patent_title] => 'Error detection and correction system for use with dual-pulse output metering devices' [patent_app_type] => B1 [patent_app_number] => 09/376844 [patent_app_country] => US [patent_app_date] => 1999-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2865 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/542/06542832.pdf [firstpage_image] =>[orig_patent_app_number] => 09376844 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/376844
Error detection and correction system for use with dual-pulse output metering devices Aug 17, 1999 Issued
Array ( [id] => 1585058 [patent_doc_number] => 06449742 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Test and characterization of source synchronous AC timing specifications by trace length modulation of accurately controlled interconnect topology of the test unit interface' [patent_app_type] => B1 [patent_app_number] => 09/372654 [patent_app_country] => US [patent_app_date] => 1999-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2043 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/449/06449742.pdf [firstpage_image] =>[orig_patent_app_number] => 09372654 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/372654
Test and characterization of source synchronous AC timing specifications by trace length modulation of accurately controlled interconnect topology of the test unit interface Aug 10, 1999 Issued
Array ( [id] => 1412632 [patent_doc_number] => 06553529 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-22 [patent_title] => 'Low cost timing system for highly accurate multi-modal semiconductor testing' [patent_app_type] => B1 [patent_app_number] => 09/360215 [patent_app_country] => US [patent_app_date] => 1999-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4080 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/553/06553529.pdf [firstpage_image] =>[orig_patent_app_number] => 09360215 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/360215
Low cost timing system for highly accurate multi-modal semiconductor testing Jul 22, 1999 Issued
Array ( [id] => 1553889 [patent_doc_number] => 06347390 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'Data encoding method and device, data decoding method and device, and data supply medium' [patent_app_type] => B1 [patent_app_number] => 09/354240 [patent_app_country] => US [patent_app_date] => 1999-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 16817 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/347/06347390.pdf [firstpage_image] =>[orig_patent_app_number] => 09354240 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/354240
Data encoding method and device, data decoding method and device, and data supply medium Jul 15, 1999 Issued
Array ( [id] => 1407643 [patent_doc_number] => 06560733 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-06 [patent_title] => 'Soft error detection for digital signal processors' [patent_app_type] => B1 [patent_app_number] => 09/350316 [patent_app_country] => US [patent_app_date] => 1999-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2592 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/560/06560733.pdf [firstpage_image] =>[orig_patent_app_number] => 09350316 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/350316
Soft error detection for digital signal processors Jul 8, 1999 Issued
Array ( [id] => 1506106 [patent_doc_number] => 06487689 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-26 [patent_title] => 'Receiver initiated recovery algorithm (RIRA) for the layer 2 tunneling protocol (L2TP)' [patent_app_type] => B1 [patent_app_number] => 09/350431 [patent_app_country] => US [patent_app_date] => 1999-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3434 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/487/06487689.pdf [firstpage_image] =>[orig_patent_app_number] => 09350431 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/350431
Receiver initiated recovery algorithm (RIRA) for the layer 2 tunneling protocol (L2TP) Jul 7, 1999 Issued
Array ( [id] => 1258661 [patent_doc_number] => 06671851 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-30 [patent_title] => 'Coding device and communication system using the same' [patent_app_type] => B1 [patent_app_number] => 09/348958 [patent_app_country] => US [patent_app_date] => 1999-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3901 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/671/06671851.pdf [firstpage_image] =>[orig_patent_app_number] => 09348958 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/348958
Coding device and communication system using the same Jul 6, 1999 Issued
Array ( [id] => 7625679 [patent_doc_number] => 06769088 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-27 [patent_title] => 'Sector-coding technique for reduced read-after-write operations' [patent_app_type] => B1 [patent_app_number] => 09/345245 [patent_app_country] => US [patent_app_date] => 1999-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6289 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/769/06769088.pdf [firstpage_image] =>[orig_patent_app_number] => 09345245 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/345245
Sector-coding technique for reduced read-after-write operations Jun 29, 1999 Issued
Array ( [id] => 1602340 [patent_doc_number] => 06493845 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-10 [patent_title] => 'Parallel input output combined system for producing error correction code redundancy symbols and error syndromes' [patent_app_type] => B1 [patent_app_number] => 09/337122 [patent_app_country] => US [patent_app_date] => 1999-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7382 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/493/06493845.pdf [firstpage_image] =>[orig_patent_app_number] => 09337122 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/337122
Parallel input output combined system for producing error correction code redundancy symbols and error syndromes Jun 20, 1999 Issued
Array ( [id] => 1311833 [patent_doc_number] => 06625773 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-23 [patent_title] => 'System for multicast communications in packet switched networks' [patent_app_type] => B1 [patent_app_number] => 09/329101 [patent_app_country] => US [patent_app_date] => 1999-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4131 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/625/06625773.pdf [firstpage_image] =>[orig_patent_app_number] => 09329101 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/329101
System for multicast communications in packet switched networks Jun 8, 1999 Issued
Array ( [id] => 1284929 [patent_doc_number] => 06651200 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-18 [patent_title] => 'Method and apparatus for adaptive clocking for boundary scan testing and device programming' [patent_app_type] => B1 [patent_app_number] => 09/325638 [patent_app_country] => US [patent_app_date] => 1999-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3358 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/651/06651200.pdf [firstpage_image] =>[orig_patent_app_number] => 09325638 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/325638
Method and apparatus for adaptive clocking for boundary scan testing and device programming Jun 3, 1999 Issued
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