Search

Jeffrey L Sterrett

Examiner (ID: 8867, Phone: (571)272-2085 , Office: P/2838 )

Most Active Art Unit
2838
Art Unit(s)
2111, 2838, 2102, 2722
Total Applications
2519
Issued Applications
2232
Pending Applications
66
Abandoned Applications
220

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10739292 [patent_doc_number] => 20160085443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'APPARATUS, SYSTEM AND METHOD FOR DETERMINING COMPARISON INFORMATION BASED ON MEMORY DATA' [patent_app_type] => utility [patent_app_number] => 14/493130 [patent_app_country] => US [patent_app_date] => 2014-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10645 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14493130 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/493130
Apparatus, system and method for determining comparison information based on memory data Sep 21, 2014 Issued
Array ( [id] => 12932644 [patent_doc_number] => 09830088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-28 [patent_title] => Optimized read access to shared data via monitoring of mirroring operations [patent_app_type] => utility [patent_app_number] => 14/493094 [patent_app_country] => US [patent_app_date] => 2014-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 7810 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14493094 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/493094
Optimized read access to shared data via monitoring of mirroring operations Sep 21, 2014 Issued
Array ( [id] => 12011468 [patent_doc_number] => 09804785 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-31 [patent_title] => 'Nonvolatile memory adaptive to host boot up routine' [patent_app_type] => utility [patent_app_number] => 14/493147 [patent_app_country] => US [patent_app_date] => 2014-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 8762 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14493147 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/493147
Nonvolatile memory adaptive to host boot up routine Sep 21, 2014 Issued
Array ( [id] => 11801454 [patent_doc_number] => 09542331 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-10 [patent_title] => 'Concurrent update of data in cache with destage to disk' [patent_app_type] => utility [patent_app_number] => 14/493008 [patent_app_country] => US [patent_app_date] => 2014-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4142 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14493008 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/493008
Concurrent update of data in cache with destage to disk Sep 21, 2014 Issued
Array ( [id] => 12474639 [patent_doc_number] => 09990131 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-05 [patent_title] => Managing memory in a multiprocessor system [patent_app_type] => utility [patent_app_number] => 14/493081 [patent_app_country] => US [patent_app_date] => 2014-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4242 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14493081 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/493081
Managing memory in a multiprocessor system Sep 21, 2014 Issued
Array ( [id] => 10673006 [patent_doc_number] => 20160019151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'USING L1 CACHE AS RE-ORDER BUFFER' [patent_app_type] => utility [patent_app_number] => 14/335351 [patent_app_country] => US [patent_app_date] => 2014-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7152 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14335351 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/335351
Using L1 cache as re-order buffer Jul 17, 2014 Issued
Array ( [id] => 10673040 [patent_doc_number] => 20160019184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'NO-LOCALITY HINT VECTOR MEMORY ACCESS PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS' [patent_app_type] => utility [patent_app_number] => 14/335006 [patent_app_country] => US [patent_app_date] => 2014-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 26431 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14335006 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/335006
No-locality hint vector memory access processors, methods, systems, and instructions Jul 17, 2014 Issued
Array ( [id] => 9840891 [patent_doc_number] => 20150032973 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-29 [patent_title] => 'System and Method for Detecting False Sharing' [patent_app_type] => utility [patent_app_number] => 14/335621 [patent_app_country] => US [patent_app_date] => 2014-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7089 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14335621 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/335621
System and method for detecting false sharing Jul 17, 2014 Issued
Array ( [id] => 9859804 [patent_doc_number] => 20150039821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-05 [patent_title] => 'COMMUNICATION APPARATUS AND DATA PROCESSING METHOD' [patent_app_type] => utility [patent_app_number] => 14/334977 [patent_app_country] => US [patent_app_date] => 2014-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5968 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14334977 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/334977
Communication apparatus and data processing method Jul 17, 2014 Issued
Array ( [id] => 10927983 [patent_doc_number] => 20140331004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-06 [patent_title] => 'Write Spike Performance Enhancement In Hybrid Storage Systems' [patent_app_type] => utility [patent_app_number] => 14/322181 [patent_app_country] => US [patent_app_date] => 2014-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4266 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14322181 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/322181
Write spike performance enhancement in hybrid storage systems Jul 1, 2014 Issued
Array ( [id] => 10969643 [patent_doc_number] => 20140372676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'ELECTRONIC DEVICE AND METHOD FOR MOUNTING FILE SYSTEM USING VIRTUAL BLOCK DEVICE' [patent_app_type] => utility [patent_app_number] => 14/300553 [patent_app_country] => US [patent_app_date] => 2014-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8209 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14300553 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/300553
Electronic device and method for mounting file system using virtual block device Jun 9, 2014 Issued
Array ( [id] => 10470961 [patent_doc_number] => 20150355977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'System and Method for Making a Backup Copy of Live Data' [patent_app_type] => utility [patent_app_number] => 14/300490 [patent_app_country] => US [patent_app_date] => 2014-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5305 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14300490 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/300490
System and Method for Making a Backup Copy of Live Data Jun 9, 2014 Abandoned
Array ( [id] => 10446623 [patent_doc_number] => 20150331637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'VIBRATION MITIGATION FOR A DATA STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/300439 [patent_app_country] => US [patent_app_date] => 2014-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5514 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14300439 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/300439
Vibration mitigation for a data storage device Jun 9, 2014 Issued
Array ( [id] => 11246203 [patent_doc_number] => 09472248 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-18 [patent_title] => 'Method and apparatus for implementing a heterogeneous memory subsystem' [patent_app_type] => utility [patent_app_number] => 14/228856 [patent_app_country] => US [patent_app_date] => 2014-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 10078 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14228856 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/228856
Method and apparatus for implementing a heterogeneous memory subsystem Mar 27, 2014 Issued
Array ( [id] => 11430897 [patent_doc_number] => 09569212 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'Instruction and logic for a memory ordering buffer' [patent_app_type] => utility [patent_app_number] => 14/229007 [patent_app_country] => US [patent_app_date] => 2014-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 32 [patent_no_of_words] => 23475 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14229007 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/229007
Instruction and logic for a memory ordering buffer Mar 27, 2014 Issued
Array ( [id] => 10922104 [patent_doc_number] => 20140325123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'INFORMATION PROCESSING APPARATUS, CONTROL CIRCUIT, AND CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 14/228655 [patent_app_country] => US [patent_app_date] => 2014-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 18721 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14228655 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/228655
INFORMATION PROCESSING APPARATUS, CONTROL CIRCUIT, AND CONTROL METHOD Mar 27, 2014 Abandoned
Array ( [id] => 12114216 [patent_doc_number] => 09870209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-16 [patent_title] => 'Instruction and logic for reducing data cache evictions in an out-of-order processor' [patent_app_type] => utility [patent_app_number] => 14/228697 [patent_app_country] => US [patent_app_date] => 2014-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 25712 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14228697 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/228697
Instruction and logic for reducing data cache evictions in an out-of-order processor Mar 27, 2014 Issued
Array ( [id] => 11430821 [patent_doc_number] => 09569137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'Method and system for cascaded flashcopy zoning and algorithm and/or computer program code and method implementing the same' [patent_app_type] => utility [patent_app_number] => 14/223381 [patent_app_country] => US [patent_app_date] => 2014-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3451 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14223381 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/223381
Method and system for cascaded flashcopy zoning and algorithm and/or computer program code and method implementing the same Mar 23, 2014 Issued
Array ( [id] => 10293010 [patent_doc_number] => 20150178009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'DATA STORAGE DEVICE AND DATA PROCESSING SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/198248 [patent_app_country] => US [patent_app_date] => 2014-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5359 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14198248 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/198248
Data storage device and data processing system including the same Mar 4, 2014 Issued
Array ( [id] => 10550087 [patent_doc_number] => 09274712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-01 [patent_title] => 'Memory wear control' [patent_app_type] => utility [patent_app_number] => 14/189697 [patent_app_country] => US [patent_app_date] => 2014-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4690 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14189697 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/189697
Memory wear control Feb 24, 2014 Issued
Menu