Search

Jeffrey S. Lenihan

Examiner (ID: 6521, Phone: (571)270-5452 , Office: P/1765 )

Most Active Art Unit
1765
Art Unit(s)
1765, 1796
Total Applications
980
Issued Applications
658
Pending Applications
84
Abandoned Applications
255

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19928239 [patent_doc_number] => 12302550 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Semiconductor memory device including capacitor with a dielectric film on an upper plate region, a lower plate region, and a side surface of a connecting region therebetween [patent_app_type] => utility [patent_app_number] => 17/699839 [patent_app_country] => US [patent_app_date] => 2022-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 53 [patent_no_of_words] => 5340 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17699839 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/699839
Semiconductor memory device including capacitor with a dielectric film on an upper plate region, a lower plate region, and a side surface of a connecting region therebetween Mar 20, 2022 Issued
Array ( [id] => 18617703 [patent_doc_number] => 20230284444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => MEMORY DEVICE HAVING ACTIVE AREA IN STRIP AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/685520 [patent_app_country] => US [patent_app_date] => 2022-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6018 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17685520 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/685520
MEMORY DEVICE HAVING ACTIVE AREA IN STRIP AND MANUFACTURING METHOD THEREOF Mar 2, 2022 Abandoned
Array ( [id] => 18256119 [patent_doc_number] => 20230083158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/682889 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11728 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17682889 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/682889
SEMICONDUCTOR DEVICE Feb 27, 2022 Abandoned
Array ( [id] => 17900995 [patent_doc_number] => 20220310657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => ARRAYED SWITCH CIRCUITRY SYSTEM AND SWITCHING CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/678853 [patent_app_country] => US [patent_app_date] => 2022-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6358 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17678853 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/678853
ARRAYED SWITCH CIRCUITRY SYSTEM AND SWITCHING CIRCUIT Feb 22, 2022 Pending
Array ( [id] => 18008669 [patent_doc_number] => 20220367436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => Cross-type semiconductor capacitor array layout [patent_app_type] => utility [patent_app_number] => 17/676858 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3932 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17676858 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/676858
Cross-type semiconductor capacitor array layout Feb 21, 2022 Abandoned
Array ( [id] => 17723691 [patent_doc_number] => 20220216413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => OLEDS FOR MICRO TRANSFER PRINTING [patent_app_type] => utility [patent_app_number] => 17/671752 [patent_app_country] => US [patent_app_date] => 2022-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12224 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17671752 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/671752
OLEDS FOR MICRO TRANSFER PRINTING Feb 14, 2022 Pending
Array ( [id] => 18555381 [patent_doc_number] => 20230253398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/668886 [patent_app_country] => US [patent_app_date] => 2022-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2177 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17668886 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/668886
SEMICONDUCTOR DEVICE Feb 9, 2022 Abandoned
Array ( [id] => 17645293 [patent_doc_number] => 20220173032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/667955 [patent_app_country] => US [patent_app_date] => 2022-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12362 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17667955 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/667955
Semiconductor memory device with three-dimensionally stacked memory cells having improved yield Feb 8, 2022 Issued
Array ( [id] => 19552909 [patent_doc_number] => 12136622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-05 [patent_title] => Bidirectional electrostatic discharge (ESD) protection device [patent_app_type] => utility [patent_app_number] => 17/646735 [patent_app_country] => US [patent_app_date] => 2022-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6772 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 681 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17646735 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/646735
Bidirectional electrostatic discharge (ESD) protection device Jan 2, 2022 Issued
Array ( [id] => 18473277 [patent_doc_number] => 20230207565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => POWER DELIVERY USING BACKSIDE POWER FOR STITCHED DIES [patent_app_type] => utility [patent_app_number] => 17/561670 [patent_app_country] => US [patent_app_date] => 2021-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18143 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17561670 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/561670
POWER DELIVERY USING BACKSIDE POWER FOR STITCHED DIES Dec 22, 2021 Pending
Array ( [id] => 19031254 [patent_doc_number] => 11930629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Semiconductor memory device including multiple conductive line layers [patent_app_type] => utility [patent_app_number] => 17/546241 [patent_app_country] => US [patent_app_date] => 2021-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6477 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17546241 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/546241
Semiconductor memory device including multiple conductive line layers Dec 8, 2021 Issued
Array ( [id] => 17486170 [patent_doc_number] => 20220093674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => OPTOELECTRONIC DEVICE HAVING AN ARRAY OF GERMANIUM-BASED DIODES WITH LOW DARK CURRENT [patent_app_type] => utility [patent_app_number] => 17/540323 [patent_app_country] => US [patent_app_date] => 2021-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7905 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17540323 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/540323
Optoelectronic device having an array of germanium-based diodes with low dark current Dec 1, 2021 Issued
Array ( [id] => 17486384 [patent_doc_number] => 20220093888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => ORGANIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/537645 [patent_app_country] => US [patent_app_date] => 2021-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6104 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17537645 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/537645
Organic device with pixels Nov 29, 2021 Issued
Array ( [id] => 18379826 [patent_doc_number] => 20230154915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => DUAL RESISTOR INTEGRATION [patent_app_type] => utility [patent_app_number] => 17/525167 [patent_app_country] => US [patent_app_date] => 2021-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4593 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17525167 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/525167
DUAL RESISTOR INTEGRATION Nov 11, 2021 Pending
Array ( [id] => 18835381 [patent_doc_number] => 20230403908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => OLED DISPLAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/915755 [patent_app_country] => US [patent_app_date] => 2021-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9116 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17915755 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/915755
OLED DISPLAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE Nov 10, 2021 Pending
Array ( [id] => 17431655 [patent_doc_number] => 20220059364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => MULTI-LAYERED POLYSILICON AND OXYGEN-DOPED POLYSILICON DESIGN FOR RF SOI TRAP-RICH POLY LAYER [patent_app_type] => utility [patent_app_number] => 17/519765 [patent_app_country] => US [patent_app_date] => 2021-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7440 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17519765 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/519765
Multi-layered polysilicon and oxygen-doped polysilicon design for RF SOI trap-rich poly layer Nov 4, 2021 Issued
Array ( [id] => 18347239 [patent_doc_number] => 20230135349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => MULTI-ROW HEIGHT COMPOSITE CELL WITH MULTIPLE LOGIC FUNCTIONS [patent_app_type] => utility [patent_app_number] => 17/514856 [patent_app_country] => US [patent_app_date] => 2021-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4754 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17514856 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/514856
MULTI-ROW HEIGHT COMPOSITE CELL WITH MULTIPLE LOGIC FUNCTIONS Oct 28, 2021 Pending
Array ( [id] => 19733848 [patent_doc_number] => 12211850 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Cell architecture with extended transistor geometry [patent_app_type] => utility [patent_app_number] => 17/514580 [patent_app_country] => US [patent_app_date] => 2021-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4383 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17514580 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/514580
Cell architecture with extended transistor geometry Oct 28, 2021 Issued
Array ( [id] => 18209461 [patent_doc_number] => 20230055721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/451943 [patent_app_country] => US [patent_app_date] => 2021-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 33146 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17451943 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/451943
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Oct 21, 2021 Pending
Array ( [id] => 17900964 [patent_doc_number] => 20220310626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => METHOD FOR FABRICATING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/504536 [patent_app_country] => US [patent_app_date] => 2021-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4691 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17504536 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/504536
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE Oct 18, 2021 Abandoned
Menu