
Jeffrey T. Knapp
Examiner (ID: 7182)
| Most Active Art Unit | 3205 |
| Art Unit(s) | 1722, 3616, 3202, 1725, 3205 |
| Total Applications | 712 |
| Issued Applications | 662 |
| Pending Applications | 22 |
| Abandoned Applications | 28 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
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[id] => 5701832
[patent_doc_number] => 20060218517
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[patent_title] => 'Method for designing integrated circuits comprising replacement logic gates'
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[patent_app_country] => US
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Array
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Array
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Array
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