Search

Jenise E. Jackson

Examiner (ID: 18796, Phone: (571)272-3791 , Office: P/2439 )

Most Active Art Unit
2439
Art Unit(s)
2499, 2439, 2131, 2139
Total Applications
822
Issued Applications
589
Pending Applications
81
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16226283 [patent_doc_number] => 20200251400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-06 [patent_title] => SEMICONDUCTOR CHIP PACKAGE COMPRISING SUBSTRATE, SEMICONDUCTOR CHIP, AND LEADFRAME AND A METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/929296 [patent_app_country] => US [patent_app_date] => 2020-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9349 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15929296 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/929296
Semiconductor chip package comprising a leadframe connected to a substrate and a semiconductor chip, and a method for fabricating the same Apr 22, 2020 Issued
Array ( [id] => 16700028 [patent_doc_number] => 10950636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Array substrate with openings in insulation layer for auxiliary electrode and method for fabricating thereof [patent_app_type] => utility [patent_app_number] => 16/792291 [patent_app_country] => US [patent_app_date] => 2020-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 55 [patent_no_of_words] => 11748 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 555 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16792291 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/792291
Array substrate with openings in insulation layer for auxiliary electrode and method for fabricating thereof Feb 15, 2020 Issued
Array ( [id] => 17638283 [patent_doc_number] => 11349019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Semiconductor device with an expanded doping concentration distribution in an accumulation region [patent_app_type] => utility [patent_app_number] => 16/735704 [patent_app_country] => US [patent_app_date] => 2020-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13633 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 344 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16735704 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/735704
Semiconductor device with an expanded doping concentration distribution in an accumulation region Jan 6, 2020 Issued
Array ( [id] => 15775857 [patent_doc_number] => 20200118946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => ENHANCED BONDING BETWEEN III-V MATERIAL AND OXIDE MATERIAL [patent_app_type] => utility [patent_app_number] => 16/707108 [patent_app_country] => US [patent_app_date] => 2019-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8567 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16707108 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/707108
Enhanced bonding between III-V material and oxide material Dec 8, 2019 Issued
Array ( [id] => 15688481 [patent_doc_number] => 20200098904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING A SHOULDER PORTION [patent_app_type] => utility [patent_app_number] => 16/695179 [patent_app_country] => US [patent_app_date] => 2019-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8221 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16695179 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/695179
Method of manufacturing a semiconductor device including a shoulder portion Nov 25, 2019 Issued
Array ( [id] => 17607303 [patent_doc_number] => 11335795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Reverse-conducting IGBT and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/693369 [patent_app_country] => US [patent_app_date] => 2019-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11221 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16693369 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/693369
Reverse-conducting IGBT and manufacturing method thereof Nov 23, 2019 Issued
Array ( [id] => 17211185 [patent_doc_number] => 11171571 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Alternating current solid-state switch [patent_app_type] => utility [patent_app_number] => 16/674576 [patent_app_country] => US [patent_app_date] => 2019-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4276 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16674576 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/674576
Alternating current solid-state switch Nov 4, 2019 Issued
Array ( [id] => 15462093 [patent_doc_number] => 20200043871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => ARRAY SUBSTRATE AND METHOD FOR PRODUCING THE SAME [patent_app_type] => utility [patent_app_number] => 16/601351 [patent_app_country] => US [patent_app_date] => 2019-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7061 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16601351 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/601351
Array substrate with static charge releasing pattern and method for producing the same Oct 13, 2019 Issued
Array ( [id] => 17107689 [patent_doc_number] => 11127917 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => Spectral emission modification using localized surface plasmon of metallic nanoparticles [patent_app_type] => utility [patent_app_number] => 16/582449 [patent_app_country] => US [patent_app_date] => 2019-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9046 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16582449 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/582449
Spectral emission modification using localized surface plasmon of metallic nanoparticles Sep 24, 2019 Issued
Array ( [id] => 16464294 [patent_doc_number] => 10847657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Method for manufacturing thin film transistor with oxide semiconductor channel [patent_app_type] => utility [patent_app_number] => 16/550161 [patent_app_country] => US [patent_app_date] => 2019-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 40 [patent_no_of_words] => 17811 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 385 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16550161 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/550161
Method for manufacturing thin film transistor with oxide semiconductor channel Aug 22, 2019 Issued
Array ( [id] => 14969509 [patent_doc_number] => 20190312233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/450174 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12639 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450174 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/450174
Organic light emitting diode display device with micro lenses Jun 23, 2019 Issued
Array ( [id] => 17078227 [patent_doc_number] => 11114643 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-07 [patent_title] => Organic light emitting device with micro lenses and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/424613 [patent_app_country] => US [patent_app_date] => 2019-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7663 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 387 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16424613 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/424613
Organic light emitting device with micro lenses and method for manufacturing the same May 28, 2019 Issued
Array ( [id] => 17544283 [patent_doc_number] => 11309418 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Contact structure for FinFET semiconductor device [patent_app_type] => utility [patent_app_number] => 16/417051 [patent_app_country] => US [patent_app_date] => 2019-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 9113 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16417051 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/417051
Contact structure for FinFET semiconductor device May 19, 2019 Issued
Array ( [id] => 16119923 [patent_doc_number] => 20200211984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => ELECTRONIC DEVICE PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/404765 [patent_app_country] => US [patent_app_date] => 2019-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6302 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16404765 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/404765
ELECTRONIC DEVICE PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF May 6, 2019 Abandoned
Array ( [id] => 17166205 [patent_doc_number] => 11152317 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Semiconductor device including interconnection structure including copper and tin and semiconductor package including the same [patent_app_type] => utility [patent_app_number] => 16/404841 [patent_app_country] => US [patent_app_date] => 2019-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 11329 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16404841 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/404841
Semiconductor device including interconnection structure including copper and tin and semiconductor package including the same May 6, 2019 Issued
Array ( [id] => 15030843 [patent_doc_number] => 20190326426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => GALLIUM NITRIDE TRANSISTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/391670 [patent_app_country] => US [patent_app_date] => 2019-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7897 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16391670 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/391670
Transistor structure with depletion-mode and enhancement mode-devices Apr 22, 2019 Issued
Array ( [id] => 14587941 [patent_doc_number] => 20190221579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/362932 [patent_app_country] => US [patent_app_date] => 2019-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9310 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16362932 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/362932
THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE Mar 24, 2019 Abandoned
Array ( [id] => 16928310 [patent_doc_number] => 11049801 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-29 [patent_title] => Encapsulated vertical interconnects for high-speed applications and methods of assembling same [patent_app_type] => utility [patent_app_number] => 16/279656 [patent_app_country] => US [patent_app_date] => 2019-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7249 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16279656 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/279656
Encapsulated vertical interconnects for high-speed applications and methods of assembling same Feb 18, 2019 Issued
Array ( [id] => 16081193 [patent_doc_number] => 20200194583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => METAL SOURCE LDMOS SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/279735 [patent_app_country] => US [patent_app_date] => 2019-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3103 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16279735 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/279735
METAL SOURCE LDMOS SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Feb 18, 2019 Abandoned
Array ( [id] => 16495707 [patent_doc_number] => 10861756 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-08 [patent_title] => Semiconductor device including sensor and driving terminals spaced away from the semiconductor device case wall [patent_app_type] => utility [patent_app_number] => 16/268698 [patent_app_country] => US [patent_app_date] => 2019-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 6496 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16268698 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/268698
Semiconductor device including sensor and driving terminals spaced away from the semiconductor device case wall Feb 5, 2019 Issued
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