
Jenny L. Wagner
Supervisory Patent Examiner (ID: 7394, Phone: (571)272-5359 , Office: P/2848 )
| Most Active Art Unit | 2891 |
| Art Unit(s) | 2891, 2848, 2112, 2800 |
| Total Applications | 432 |
| Issued Applications | 298 |
| Pending Applications | 0 |
| Abandoned Applications | 134 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8897230
[patent_doc_number] => 08476753
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-07-02
[patent_title] => 'Process for enhanced 3D integration and structures generated using the same'
[patent_app_type] => utility
[patent_app_number] => 13/586054
[patent_app_country] => US
[patent_app_date] => 2012-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8339
[patent_no_of_claims] => 6
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[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13586054
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/586054 | Process for enhanced 3D integration and structures generated using the same | Aug 14, 2012 | Issued |
Array
(
[id] => 9119722
[patent_doc_number] => 20130286644
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-31
[patent_title] => 'LED LIGHT BAR WITH BALANCED RESISTANCE FOR LIGHT EMTITTING DIODES THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/563738
[patent_app_country] => US
[patent_app_date] => 2012-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13563738
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/563738 | LED LIGHT BAR WITH BALANCED RESISTANCE FOR LIGHT EMTITTING DIODES THEREOF | Jul 31, 2012 | Abandoned |
Array
(
[id] => 8802860
[patent_doc_number] => 08441136
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-05-14
[patent_title] => 'Protection layer for adhesive material at wafer edge'
[patent_app_type] => utility
[patent_app_number] => 13/560200
[patent_app_country] => US
[patent_app_date] => 2012-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13560200
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/560200 | Protection layer for adhesive material at wafer edge | Jul 26, 2012 | Issued |
Array
(
[id] => 8858504
[patent_doc_number] => 08461039
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-06-11
[patent_title] => 'Patternable low-K dielectric interconnect structure with a graded cap layer and method of fabrication'
[patent_app_type] => utility
[patent_app_number] => 13/524298
[patent_app_country] => US
[patent_app_date] => 2012-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 20801
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13524298
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/524298 | Patternable low-K dielectric interconnect structure with a graded cap layer and method of fabrication | Jun 14, 2012 | Issued |
Array
(
[id] => 8760726
[patent_doc_number] => 08421250
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-04-16
[patent_title] => 'Semiconductor device and a method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 13/525122
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[patent_app_date] => 2012-06-15
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13525122
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/525122 | Semiconductor device and a method of manufacturing the same | Jun 14, 2012 | Issued |
Array
(
[id] => 8426754
[patent_doc_number] => 20120248629
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-04
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MAKING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/495195
[patent_app_country] => US
[patent_app_date] => 2012-06-13
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/495195 | Semiconductor device and method of making semiconductor device | Jun 12, 2012 | Issued |
Array
(
[id] => 9239831
[patent_doc_number] => 08604626
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-12-10
[patent_title] => 'Reduced susceptibility to electrostatic discharge during 3D semiconductor device bonding and assembly'
[patent_app_type] => utility
[patent_app_number] => 13/470692
[patent_app_country] => US
[patent_app_date] => 2012-05-14
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13470692
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/470692 | Reduced susceptibility to electrostatic discharge during 3D semiconductor device bonding and assembly | May 13, 2012 | Issued |
Array
(
[id] => 8578304
[patent_doc_number] => 08344517
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-01-01
[patent_title] => 'Integrated circuit devices including air spacers separating conductive structures and contact plugs and methods of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 13/469434
[patent_app_country] => US
[patent_app_date] => 2012-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 41
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13469434
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/469434 | Integrated circuit devices including air spacers separating conductive structures and contact plugs and methods of fabricating the same | May 10, 2012 | Issued |
Array
(
[id] => 8390919
[patent_doc_number] => 20120228765
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-13
[patent_title] => 'SOLDER BUMP INTERCONNECT'
[patent_app_type] => utility
[patent_app_number] => 13/457311
[patent_app_country] => US
[patent_app_date] => 2012-04-26
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13457311
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/457311 | Solder bump interconnect | Apr 25, 2012 | Issued |
Array
(
[id] => 9216254
[patent_doc_number] => 08629054
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-01-14
[patent_title] => 'Packaged semiconductor assemblies and methods for manufacturing such assemblies'
[patent_app_type] => utility
[patent_app_number] => 13/441533
[patent_app_country] => US
[patent_app_date] => 2012-04-06
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13441533
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/441533 | Packaged semiconductor assemblies and methods for manufacturing such assemblies | Apr 5, 2012 | Issued |
Array
(
[id] => 8310561
[patent_doc_number] => 20120187579
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-26
[patent_title] => 'LOW NOISE FLIP-CHIP PACKAGES AND FLIP CHIPS THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/434473
[patent_app_country] => US
[patent_app_date] => 2012-03-29
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/434473 | Low noise flip-chip packages and flip chips thereof | Mar 28, 2012 | Issued |
Array
(
[id] => 8470296
[patent_doc_number] => 08299475
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-30
[patent_title] => 'Interlevel conductive light shield'
[patent_app_type] => utility
[patent_app_number] => 13/408141
[patent_app_country] => US
[patent_app_date] => 2012-02-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/408141 | Interlevel conductive light shield | Feb 28, 2012 | Issued |
Array
(
[id] => 8306388
[patent_doc_number] => 08227925
[patent_country] => US
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[patent_issue_date] => 2012-07-24
[patent_title] => 'Integrated circuit packaging system with interposer'
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[patent_app_number] => 13/397562
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/397562 | Integrated circuit packaging system with interposer | Feb 14, 2012 | Issued |
Array
(
[id] => 8205295
[patent_doc_number] => 20120126414
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-24
[patent_title] => 'Semiconductor Device and Manufacturing Method Thereof'
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[pdf_file] => publications/A1/0126/20120126414.pdf
[firstpage_image] =>[orig_patent_app_number] => 13363253
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/363253 | Semiconductor Device and Manufacturing Method Thereof | Jan 30, 2012 | Abandoned |
Array
(
[id] => 8470430
[patent_doc_number] => 08299609
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-30
[patent_title] => 'Product chips and die with a feature pattern that contains information relating to the product chip'
[patent_app_type] => utility
[patent_app_number] => 13/360055
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[patent_app_date] => 2012-01-27
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/360055 | Product chips and die with a feature pattern that contains information relating to the product chip | Jan 26, 2012 | Issued |
Array
(
[id] => 8207525
[patent_doc_number] => 20120127683
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-24
[patent_title] => 'ELECTRONIC DEVICE, RESONATOR, OSCILLATOR AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/359965
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[firstpage_image] =>[orig_patent_app_number] => 13359965
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/359965 | ELECTRONIC DEVICE, RESONATOR, OSCILLATOR AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE | Jan 26, 2012 | Abandoned |
Array
(
[id] => 8726022
[patent_doc_number] => 08405144
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-03-26
[patent_title] => 'Semiconductor device with vertical current flow and low substrate resistance and manufacturing process thereof'
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[patent_app_number] => 13/357547
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/357547 | Semiconductor device with vertical current flow and low substrate resistance and manufacturing process thereof | Jan 23, 2012 | Issued |
Array
(
[id] => 8193066
[patent_doc_number] => 20120119382
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-17
[patent_title] => 'SEMICONDUCTOR DEVICE WITH VERTICAL CURRENT FLOW AND LOW SUBSTRATE RESISTANCE AND MANUFACTURING PROCESS THEREOF'
[patent_app_type] => utility
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Array
(
[id] => 8185521
[patent_doc_number] => 20120115320
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-10
[patent_title] => 'SEMICONDUCTOR DEVICE HAVING DECREASED CONTACT RESISTANCE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/348864
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[firstpage_image] =>[orig_patent_app_number] => 13348864
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/348864 | Semiconductor device having decreased contact resistance and method for manufacturing the same | Jan 11, 2012 | Issued |
Array
(
[id] => 8169233
[patent_doc_number] => 20120106094
[patent_country] => US
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[patent_title] => 'LOW-NOISE FLIP-CHIP PACKAGES AND FLIP CHIPS THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/347394
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[pdf_file] => publications/A1/0106/20120106094.pdf
[firstpage_image] =>[orig_patent_app_number] => 13347394
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/347394 | Low-noise flip-chip packages and flip chips thereof | Jan 9, 2012 | Issued |