
Jenny L. Wagner
Supervisory Patent Examiner (ID: 7394, Phone: (571)272-5359 , Office: P/2848 )
| Most Active Art Unit | 2891 |
| Art Unit(s) | 2891, 2848, 2112, 2800 |
| Total Applications | 432 |
| Issued Applications | 298 |
| Pending Applications | 0 |
| Abandoned Applications | 134 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8897251
[patent_doc_number] => 08476774
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-07-02
[patent_title] => 'Off-chip VIAS in stacked chips'
[patent_app_type] => utility
[patent_app_number] => 13/316890
[patent_app_country] => US
[patent_app_date] => 2011-12-12
[patent_effective_date] => 0000-00-00
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[patent_figures_cnt] => 26
[patent_no_of_words] => 6809
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13316890
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/316890 | Off-chip VIAS in stacked chips | Dec 11, 2011 | Issued |
Array
(
[id] => 9039873
[patent_doc_number] => 20130242511
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-19
[patent_title] => 'WIRING BOARD, DISPLAY PANEL, AND ELECTRONIC APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 13/883197
[patent_app_country] => US
[patent_app_date] => 2011-11-10
[patent_effective_date] => 0000-00-00
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Array
(
[id] => 8172644
[patent_doc_number] => 20120108014
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-03
[patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/288207
[patent_app_country] => US
[patent_app_date] => 2011-11-03
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0108/20120108014.pdf
[firstpage_image] =>[orig_patent_app_number] => 13288207
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/288207 | Method for manufacturing semiconductor device | Nov 2, 2011 | Issued |
Array
(
[id] => 9697891
[patent_doc_number] => 20140247576
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-04
[patent_title] => 'HIGH-VOLTAGE PLATFORM'
[patent_app_type] => utility
[patent_app_number] => 14/355332
[patent_app_country] => US
[patent_app_date] => 2011-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/355332 | HIGH-VOLTAGE PLATFORM | Oct 30, 2011 | Abandoned |
Array
(
[id] => 8765057
[patent_doc_number] => 20130093094
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[patent_kind] => A1
[patent_issue_date] => 2013-04-18
[patent_title] => 'Method and Apparatus for Die Assembly'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/276184 | Method and apparatus for die assembly | Oct 17, 2011 | Issued |
Array
(
[id] => 9074991
[patent_doc_number] => 08552571
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[patent_issue_date] => 2013-10-08
[patent_title] => 'Electronic device and method for production'
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[patent_app_number] => 13/267385
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/267385 | Electronic device and method for production | Oct 5, 2011 | Issued |
Array
(
[id] => 8544059
[patent_doc_number] => 08319353
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[patent_issue_date] => 2012-11-27
[patent_title] => 'Pre-formed conductive bumps on bonding pads'
[patent_app_type] => utility
[patent_app_number] => 13/246979
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13246979
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/246979 | Pre-formed conductive bumps on bonding pads | Sep 27, 2011 | Issued |
Array
(
[id] => 7738862
[patent_doc_number] => 20120018838
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-01-26
[patent_title] => 'METHOD FOR MODULAR ARRANGEMENT OF A SILICON BASED ARRAY AND MODULAR SILICON BASED ARRAY'
[patent_app_type] => utility
[patent_app_number] => 13/246170
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[pdf_file] => publications/A1/0018/20120018838.pdf
[firstpage_image] =>[orig_patent_app_number] => 13246170
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/246170 | Method for modular arrangement of a silicon based array and modular silicon based array | Sep 26, 2011 | Issued |
Array
(
[id] => 9167308
[patent_doc_number] => 08592991
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[patent_issue_date] => 2013-11-26
[patent_title] => 'Semiconductor device, fabricating method thereof and semiconductor package including the semiconductor device'
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[patent_app_number] => 13/235369
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Array
(
[id] => 8090963
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[patent_title] => 'POWER SUPPLY CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 13/230911
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[firstpage_image] =>[orig_patent_app_number] => 13230911
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/230911 | POWER SUPPLY CIRCUIT | Sep 12, 2011 | Abandoned |
Array
(
[id] => 7669610
[patent_doc_number] => 20110318879
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[patent_kind] => A1
[patent_issue_date] => 2011-12-29
[patent_title] => 'METHOD FOR PRODUCING SEMICONDUCTOR CHIP WITH ADHESIVE FILM, ADHESIVE FILM FOR SEMICONDUCTOR USED IN THE METHOD, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13228615
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/228615 | METHOD FOR PRODUCING SEMICONDUCTOR CHIP WITH ADHESIVE FILM, ADHESIVE FILM FOR SEMICONDUCTOR USED IN THE METHOD, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE | Sep 8, 2011 | Abandoned |
Array
(
[id] => 7815191
[patent_doc_number] => 20120061811
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[patent_kind] => A1
[patent_issue_date] => 2012-03-15
[patent_title] => 'APPARATUS AND METHOD CONFIGURED TO LOWER THERMAL STRESSES'
[patent_app_type] => utility
[patent_app_number] => 13/228153
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/228153 | Apparatus and method configured to lower thermal stresses | Sep 7, 2011 | Issued |
Array
(
[id] => 7662840
[patent_doc_number] => 20110312109
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[patent_title] => 'LIGHT EMITTING DIODE PACKAGE HAVING ANODIZED INSULATION LAYER AND FABRICATION METHOD THEREFOR'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/220258 | Light emitting diode package having anodized insulation layer and fabrication method therefor | Aug 28, 2011 | Issued |
Array
(
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[patent_title] => 'INTERCONNECTION IN MULTI-CHIP WITH INTERPOSERS AND BRIDGES'
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[patent_app_number] => 13/219801
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[firstpage_image] =>[orig_patent_app_number] => 13219801
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Array
(
[id] => 9167226
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[patent_title] => 'Transistor including single layer reentrant profile'
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Array
(
[id] => 8658191
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[patent_title] => 'PASSENGER SERVICE UNIT'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/206321 | Semiconductor assemblies with multi-level substrates and associated methods of manufacturing | Aug 8, 2011 | Issued |
Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/192068 | Film for flip chip type semiconductor back surface | Jul 26, 2011 | Issued |