
Jenny L. Wagner
Supervisory Patent Examiner (ID: 9120, Phone: (571)272-5359 , Office: P/2848 )
| Most Active Art Unit | 2891 |
| Art Unit(s) | 2891, 2848, 2800, 2112 |
| Total Applications | 432 |
| Issued Applications | 298 |
| Pending Applications | 0 |
| Abandoned Applications | 134 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7573613
[patent_doc_number] => 20110269269
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-11-03
[patent_title] => 'LASER ABLATION ALTERNATIVE TO LOW COST LEADFRAME PROCESS'
[patent_app_type] => utility
[patent_app_number] => 12/772896
[patent_app_country] => US
[patent_app_date] => 2010-05-03
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0269/20110269269.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/772896 | LASER ABLATION ALTERNATIVE TO LOW COST LEADFRAME PROCESS | May 2, 2010 | Abandoned |
Array
(
[id] => 8363600
[patent_doc_number] => 08252665
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-08-28
[patent_title] => 'Protection layer for adhesive material at wafer edge'
[patent_app_type] => utility
[patent_app_number] => 12/769725
[patent_app_country] => US
[patent_app_date] => 2010-04-29
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/769725 | Protection layer for adhesive material at wafer edge | Apr 28, 2010 | Issued |
Array
(
[id] => 7570605
[patent_doc_number] => 20110266260
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-11-03
[patent_title] => 'Welding Electrode With Contoured Face'
[patent_app_type] => utility
[patent_app_number] => 12/768928
[patent_app_country] => US
[patent_app_date] => 2010-04-28
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[firstpage_image] =>[orig_patent_app_number] => 12768928
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/768928 | Welding electrode with contoured face | Apr 27, 2010 | Issued |
Array
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[id] => 8664355
[patent_doc_number] => 08377816
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-19
[patent_title] => 'Method of forming electrical connections'
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[patent_app_number] => 12/768025
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Array
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[patent_doc_number] => 20100203722
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[patent_kind] => A1
[patent_issue_date] => 2010-08-12
[patent_title] => 'Semiconductor Device Having a Second Level of Metallization Formed over a First Level with Minimal Damage to the First Level and Method'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/765662 | Semiconductor device having a second level of metallization formed over a first level with minimal damage to the first level and method | Apr 21, 2010 | Issued |
Array
(
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[patent_issue_date] => 2010-08-12
[patent_title] => 'METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE'
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Array
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[patent_title] => 'PRE-TREATMENT METHOD TO INCREASE COPPER ISLAND DENSITY OF CU ON BARRIER LAYERS'
[patent_app_type] => utility
[patent_app_number] => 12/764721
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/764721 | Pre-treatment method to increase copper island density of CU on barrier layers | Apr 20, 2010 | Issued |
Array
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[id] => 6528575
[patent_doc_number] => 20100203685
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[patent_issue_date] => 2010-08-12
[patent_title] => 'SEMICONDUCTOR CHIPS WITH REDUCED STRESS FROM UNDERFILL AT EDGE OF CHIP'
[patent_app_type] => utility
[patent_app_number] => 12/762404
[patent_app_country] => US
[patent_app_date] => 2010-04-19
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/762404 | Semiconductor chips with reduced stress from underfill at edge of chip | Apr 18, 2010 | Issued |
Array
(
[id] => 6570262
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[patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/762821 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | Apr 18, 2010 | Abandoned |
Array
(
[id] => 7511005
[patent_doc_number] => 20110256715
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[patent_issue_date] => 2011-10-20
[patent_title] => 'BARRIER LAYER FOR COPPER INTERCONNECT'
[patent_app_type] => utility
[patent_app_number] => 12/761805
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/761805 | Barrier layer for copper interconnect | Apr 15, 2010 | Issued |
Array
(
[id] => 8625375
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[patent_title] => 'Intelligent stepper welding system and method'
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Array
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[patent_title] => 'Methods and systems for resistance spot welding using direct current micro pulses'
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Array
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[patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FLEX TAPE AND METHOD OF MANUFACTURE THEREOF'
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Array
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Array
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