Search

Jeremy C. Norris

Examiner (ID: 7122, Phone: (571)272-1932 , Office: P/2847 )

Most Active Art Unit
2847
Art Unit(s)
2847, 2841, 2835, 2827, 2831
Total Applications
2133
Issued Applications
1816
Pending Applications
90
Abandoned Applications
249

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7545702 [patent_doc_number] => 08053675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-08 [patent_title] => 'Apparatus for balancing power plane pin currents in a printed wiring board using collinear slots' [patent_app_type] => utility [patent_app_number] => 12/145502 [patent_app_country] => US [patent_app_date] => 2008-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3040 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/053/08053675.pdf [firstpage_image] =>[orig_patent_app_number] => 12145502 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/145502
Apparatus for balancing power plane pin currents in a printed wiring board using collinear slots Jun 24, 2008 Issued
Array ( [id] => 8555579 [patent_doc_number] => 08330053 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-11 [patent_title] => 'Optoelectronic device and method for producing an optoelectronic device' [patent_app_type] => utility [patent_app_number] => 12/144516 [patent_app_country] => US [patent_app_date] => 2008-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6252 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12144516 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/144516
Optoelectronic device and method for producing an optoelectronic device Jun 22, 2008 Issued
Array ( [id] => 4848883 [patent_doc_number] => 20080314625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'Printed Circuit Board and Method of Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 12/143214 [patent_app_country] => US [patent_app_date] => 2008-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3166 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0314/20080314625.pdf [firstpage_image] =>[orig_patent_app_number] => 12143214 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/143214
Printed circuit board and method of manufacturing the same Jun 19, 2008 Issued
Array ( [id] => 6598979 [patent_doc_number] => 20100170706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-08 [patent_title] => 'ELECTRONIC MODULE AND METHOD FOR MANUFACTURING AN ELECTRONIC MODULE' [patent_app_type] => utility [patent_app_number] => 12/452104 [patent_app_country] => US [patent_app_date] => 2008-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2805 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20100170706.pdf [firstpage_image] =>[orig_patent_app_number] => 12452104 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/452104
ELECTRONIC MODULE AND METHOD FOR MANUFACTURING AN ELECTRONIC MODULE Jun 5, 2008 Abandoned
Array ( [id] => 5572398 [patent_doc_number] => 20090139758 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-04 [patent_title] => 'Printed circuit board assembly and manufacturing method for the same' [patent_app_type] => utility [patent_app_number] => 12/155401 [patent_app_country] => US [patent_app_date] => 2008-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4071 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20090139758.pdf [firstpage_image] =>[orig_patent_app_number] => 12155401 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/155401
Printed circuit board assembly and manufacturing method for the same Jun 2, 2008 Abandoned
Array ( [id] => 7811550 [patent_doc_number] => 08134082 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-13 [patent_title] => 'Solid printed circuit board and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/377134 [patent_app_country] => US [patent_app_date] => 2008-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 55 [patent_no_of_words] => 8473 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/134/08134082.pdf [firstpage_image] =>[orig_patent_app_number] => 12377134 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/377134
Solid printed circuit board and method of manufacturing the same May 27, 2008 Issued
Array ( [id] => 5300341 [patent_doc_number] => 20090294993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-03 [patent_title] => 'Packaging substrate structure' [patent_app_type] => utility [patent_app_number] => 12/153914 [patent_app_country] => US [patent_app_date] => 2008-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3304 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20090294993.pdf [firstpage_image] =>[orig_patent_app_number] => 12153914 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/153914
Packaging substrate structure May 27, 2008 Abandoned
Array ( [id] => 6262381 [patent_doc_number] => 20100252306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-07 [patent_title] => 'INTERCONNECT SUBSTRATES, METHODS AND SYSTEMS THEREOF' [patent_app_type] => utility [patent_app_number] => 12/601632 [patent_app_country] => US [patent_app_date] => 2008-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5432 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0252/20100252306.pdf [firstpage_image] =>[orig_patent_app_number] => 12601632 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/601632
INTERCONNECT SUBSTRATES, METHODS AND SYSTEMS THEREOF May 24, 2008 Abandoned
Array ( [id] => 7997787 [patent_doc_number] => 08080741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-20 [patent_title] => 'Printed circuit board' [patent_app_type] => utility [patent_app_number] => 12/149522 [patent_app_country] => US [patent_app_date] => 2008-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3865 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/080/08080741.pdf [firstpage_image] =>[orig_patent_app_number] => 12149522 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/149522
Printed circuit board May 1, 2008 Issued
Array ( [id] => 4855833 [patent_doc_number] => 20080264683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'Metal wiring plate' [patent_app_type] => utility [patent_app_number] => 12/148804 [patent_app_country] => US [patent_app_date] => 2008-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3028 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20080264683.pdf [firstpage_image] =>[orig_patent_app_number] => 12148804 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/148804
Metal wiring plate Apr 21, 2008 Issued
Array ( [id] => 4810028 [patent_doc_number] => 20080190659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-14 [patent_title] => 'System For And Method Of Planarizing The Contact Region Of A Via By Use Of A Continuous Inline Vacuum Deposition Process' [patent_app_type] => utility [patent_app_number] => 12/103903 [patent_app_country] => US [patent_app_date] => 2008-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6310 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20080190659.pdf [firstpage_image] =>[orig_patent_app_number] => 12103903 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/103903
System For And Method Of Planarizing The Contact Region Of A Via By Use Of A Continuous Inline Vacuum Deposition Process Apr 15, 2008 Abandoned
Array ( [id] => 4952156 [patent_doc_number] => 20080185180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => 'METHOD FOR FABRICATING A PRINTED CIRCUIT BOARD HAVING A COAXIAL VIA' [patent_app_type] => utility [patent_app_number] => 12/101426 [patent_app_country] => US [patent_app_date] => 2008-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2322 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20080185180.pdf [firstpage_image] =>[orig_patent_app_number] => 12101426 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/101426
Method for fabricating a printed circuit board having a coaxial via Apr 10, 2008 Issued
Array ( [id] => 7492060 [patent_doc_number] => 08030579 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-04 [patent_title] => 'Multilayer printed wiring board' [patent_app_type] => utility [patent_app_number] => 12/099957 [patent_app_country] => US [patent_app_date] => 2008-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 55 [patent_no_of_words] => 57708 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/030/08030579.pdf [firstpage_image] =>[orig_patent_app_number] => 12099957 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/099957
Multilayer printed wiring board Apr 8, 2008 Issued
Array ( [id] => 4757906 [patent_doc_number] => 20080310132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-18 [patent_title] => 'Printed circuit board and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 12/076118 [patent_app_country] => US [patent_app_date] => 2008-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 1925 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0310/20080310132.pdf [firstpage_image] =>[orig_patent_app_number] => 12076118 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/076118
Printed circuit board and manufacturing method thereof Mar 12, 2008 Issued
Array ( [id] => 4818243 [patent_doc_number] => 20080225502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'Alternating micro-vias and throughboard vias to create PCB routing channels in BGA interconnect grid' [patent_app_type] => utility [patent_app_number] => 12/073931 [patent_app_country] => US [patent_app_date] => 2008-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1717 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20080225502.pdf [firstpage_image] =>[orig_patent_app_number] => 12073931 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/073931
Alternating micro-vias and throughboard vias to create PCB routing channels in BGA interconnect grid Mar 11, 2008 Issued
Array ( [id] => 4878139 [patent_doc_number] => 20080151522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'SEMICONDUCTOR ELEMENT, METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT, MULTI-LAYER PRINTED CIRCUIT BOARD, AND METHOD OF MANUFACTURING MULTI-LAYER PRINTED CIRCUIT BOARD' [patent_app_type] => utility [patent_app_number] => 12/034069 [patent_app_country] => US [patent_app_date] => 2008-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 71 [patent_figures_cnt] => 71 [patent_no_of_words] => 33570 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20080151522.pdf [firstpage_image] =>[orig_patent_app_number] => 12034069 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/034069
Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board Feb 19, 2008 Issued
Array ( [id] => 4590267 [patent_doc_number] => 07852634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-14 [patent_title] => 'Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board' [patent_app_type] => utility [patent_app_number] => 12/034193 [patent_app_country] => US [patent_app_date] => 2008-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 70 [patent_figures_cnt] => 70 [patent_no_of_words] => 33555 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/852/07852634.pdf [firstpage_image] =>[orig_patent_app_number] => 12034193 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/034193
Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board Feb 19, 2008 Issued
Array ( [id] => 4878139 [patent_doc_number] => 20080151522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'SEMICONDUCTOR ELEMENT, METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT, MULTI-LAYER PRINTED CIRCUIT BOARD, AND METHOD OF MANUFACTURING MULTI-LAYER PRINTED CIRCUIT BOARD' [patent_app_type] => utility [patent_app_number] => 12/034069 [patent_app_country] => US [patent_app_date] => 2008-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 71 [patent_figures_cnt] => 71 [patent_no_of_words] => 33570 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20080151522.pdf [firstpage_image] =>[orig_patent_app_number] => 12034069 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/034069
Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board Feb 19, 2008 Issued
Array ( [id] => 4878139 [patent_doc_number] => 20080151522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'SEMICONDUCTOR ELEMENT, METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT, MULTI-LAYER PRINTED CIRCUIT BOARD, AND METHOD OF MANUFACTURING MULTI-LAYER PRINTED CIRCUIT BOARD' [patent_app_type] => utility [patent_app_number] => 12/034069 [patent_app_country] => US [patent_app_date] => 2008-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 71 [patent_figures_cnt] => 71 [patent_no_of_words] => 33570 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20080151522.pdf [firstpage_image] =>[orig_patent_app_number] => 12034069 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/034069
Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board Feb 19, 2008 Issued
Array ( [id] => 4878139 [patent_doc_number] => 20080151522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'SEMICONDUCTOR ELEMENT, METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT, MULTI-LAYER PRINTED CIRCUIT BOARD, AND METHOD OF MANUFACTURING MULTI-LAYER PRINTED CIRCUIT BOARD' [patent_app_type] => utility [patent_app_number] => 12/034069 [patent_app_country] => US [patent_app_date] => 2008-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 71 [patent_figures_cnt] => 71 [patent_no_of_words] => 33570 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20080151522.pdf [firstpage_image] =>[orig_patent_app_number] => 12034069 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/034069
Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board Feb 19, 2008 Issued
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