
Jeremy S. Cerullo
Examiner (ID: 6707)
| Most Active Art Unit | 2111 |
| Art Unit(s) | 2111, 2112 |
| Total Applications | 247 |
| Issued Applications | 177 |
| Pending Applications | 1 |
| Abandoned Applications | 69 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4730301
[patent_doc_number] => 20080209092
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-28
[patent_title] => 'METHOD AND SYSTEM FOR INTERFACING A PLURALITY OF MEMORY DEVICES USING AN MMC/SD PROTOCOL'
[patent_app_type] => utility
[patent_app_number] => 12/034053
[patent_app_country] => US
[patent_app_date] => 2008-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5450
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0209/20080209092.pdf
[firstpage_image] =>[orig_patent_app_number] => 12034053
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/034053 | Method and system for interfacing a plurality of memory devices using an MMC/SD protocol | Feb 19, 2008 | Issued |
Array
(
[id] => 4606327
[patent_doc_number] => 07987313
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-07-26
[patent_title] => 'Circuit of on-chip network having four-node ring switch structure'
[patent_app_type] => utility
[patent_app_number] => 12/068752
[patent_app_country] => US
[patent_app_date] => 2008-02-11
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/987/07987313.pdf
[firstpage_image] =>[orig_patent_app_number] => 12068752
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/068752 | Circuit of on-chip network having four-node ring switch structure | Feb 10, 2008 | Issued |
Array
(
[id] => 7768058
[patent_doc_number] => 08117370
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-02-14
[patent_title] => 'IC for handheld computing unit of a computing device'
[patent_app_type] => utility
[patent_app_number] => 12/026689
[patent_app_country] => US
[patent_app_date] => 2008-02-06
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/08/117/08117370.pdf
[firstpage_image] =>[orig_patent_app_number] => 12026689
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/026689 | IC for handheld computing unit of a computing device | Feb 5, 2008 | Issued |
Array
(
[id] => 137170
[patent_doc_number] => 07698489
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-04-13
[patent_title] => 'Method for dynamically turning off bus signals into a GPU'
[patent_app_type] => utility
[patent_app_number] => 12/025704
[patent_app_country] => US
[patent_app_date] => 2008-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/698/07698489.pdf
[firstpage_image] =>[orig_patent_app_number] => 12025704
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/025704 | Method for dynamically turning off bus signals into a GPU | Feb 3, 2008 | Issued |
Array
(
[id] => 5454473
[patent_doc_number] => 20090070510
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-03-12
[patent_title] => 'PROCESSOR SELECTION FOR AN INTERRUPT BASED ON WILLINGNESS TO ACCEPT THE INTERRUPT AND ON PRIORITY'
[patent_app_type] => utility
[patent_app_number] => 11/966356
[patent_app_country] => US
[patent_app_date] => 2007-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => publications/A1/0070/20090070510.pdf
[firstpage_image] =>[orig_patent_app_number] => 11966356
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/966356 | Processor selection for an interrupt based on willingness to accept the interrupt and on priority | Dec 27, 2007 | Issued |
Array
(
[id] => 4558301
[patent_doc_number] => 07877536
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-01-25
[patent_title] => 'Scalable distributed routing scheme for PCI express switches'
[patent_app_type] => utility
[patent_app_number] => 11/964609
[patent_app_country] => US
[patent_app_date] => 2007-12-26
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[pdf_file] => patents/07/877/07877536.pdf
[firstpage_image] =>[orig_patent_app_number] => 11964609
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/964609 | Scalable distributed routing scheme for PCI express switches | Dec 25, 2007 | Issued |
Array
(
[id] => 4808931
[patent_doc_number] => 20080172509
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-17
[patent_title] => 'DATA PROCESSOR AND SEMICONDUCTOR INTEGRATED CIRCUITS'
[patent_app_type] => utility
[patent_app_number] => 11/960686
[patent_app_country] => US
[patent_app_date] => 2007-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] => publications/A1/0172/20080172509.pdf
[firstpage_image] =>[orig_patent_app_number] => 11960686
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/960686 | Data processor and semiconductor integrated circuits | Dec 18, 2007 | Issued |
Array
(
[id] => 254412
[patent_doc_number] => 07581055
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-25
[patent_title] => 'Multiple processor system and method including multiple memory hub modules'
[patent_app_type] => utility
[patent_app_number] => 12/002849
[patent_app_country] => US
[patent_app_date] => 2007-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 3909
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/581/07581055.pdf
[firstpage_image] =>[orig_patent_app_number] => 12002849
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/002849 | Multiple processor system and method including multiple memory hub modules | Dec 17, 2007 | Issued |
Array
(
[id] => 4443152
[patent_doc_number] => 07899970
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-01
[patent_title] => 'Connectivity hub with a stationary base station and a removable second hub'
[patent_app_type] => utility
[patent_app_number] => 11/951279
[patent_app_country] => US
[patent_app_date] => 2007-12-05
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/899/07899970.pdf
[firstpage_image] =>[orig_patent_app_number] => 11951279
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/951279 | Connectivity hub with a stationary base station and a removable second hub | Dec 4, 2007 | Issued |
Array
(
[id] => 4712818
[patent_doc_number] => 20080301344
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-04
[patent_title] => 'SYSTEM FOR EXPANDABLY CONNECTING ELECTRONIC DEVICES'
[patent_app_type] => utility
[patent_app_number] => 11/942725
[patent_app_country] => US
[patent_app_date] => 2007-11-20
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0301/20080301344.pdf
[firstpage_image] =>[orig_patent_app_number] => 11942725
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/942725 | SYSTEM FOR EXPANDABLY CONNECTING ELECTRONIC DEVICES | Nov 19, 2007 | Abandoned |
Array
(
[id] => 4905708
[patent_doc_number] => 20080115122
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-15
[patent_title] => 'UPDATING FIXTURE FOR BIOS IN COMPUTER SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 11/938767
[patent_app_country] => US
[patent_app_date] => 2007-11-12
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[pdf_file] => publications/A1/0115/20080115122.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/938767 | UPDATING FIXTURE FOR BIOS IN COMPUTER SYSTEM | Nov 11, 2007 | Abandoned |
Array
(
[id] => 5266755
[patent_doc_number] => 20090119440
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-07
[patent_title] => 'SELF-CONFIGURING BUS FOR CONNECTING ELECTRONIC DEVICES'
[patent_app_type] => utility
[patent_app_number] => 11/934134
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[firstpage_image] =>[orig_patent_app_number] => 11934134
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/934134 | SELF-CONFIGURING BUS FOR CONNECTING ELECTRONIC DEVICES | Nov 1, 2007 | Abandoned |
Array
(
[id] => 4527198
[patent_doc_number] => 07934032
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-04-26
[patent_title] => 'Interface for establishing operability between a processor module and input/output (I/O) modules'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/864140 | Interface for establishing operability between a processor module and input/output (I/O) modules | Sep 27, 2007 | Issued |
Array
(
[id] => 4462265
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[patent_title] => 'Devices and methods for sharing common target device with two different hosts according to common communication protocol'
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Array
(
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[patent_title] => 'Queued locks using monitor-memory wait'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/903249 | Queued locks using monitor-memory wait | Sep 19, 2007 | Issued |
Array
(
[id] => 4754680
[patent_doc_number] => 20080162756
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[patent_title] => 'METHOD AND APPARATUS FOR COMMUNICATION BETWEEN UNIVERSAL SERIAL BUS (USB) HOST AND USB DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/852569
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[firstpage_image] =>[orig_patent_app_number] => 11852569
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/852569 | Method and apparatus for communication between universal serial bus (USB) host and USB device | Sep 9, 2007 | Issued |
Array
(
[id] => 188511
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/828193 | System and Method for Mounting User Interface Devices | Jul 24, 2007 | Abandoned |
Array
(
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[patent_title] => 'Cable presence detection system'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/879897 | Cable presence detection system | Jul 18, 2007 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/776916 | Dual bus matrix architecture for micro-controllers | Jul 11, 2007 | Issued |