Jerome D Goldberg

Array ( [id] => 7642407 [patent_doc_number] => 06430639 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Minimizing use of bus command code points to request the start and end of a lock' [patent_app_type] => B1 [patent_app_number] => 09/339351 [patent_app_country] => US [patent_app_date] => 1999-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5891 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/430/06430639.pdf [firstpage_image] =>[orig_patent_app_number] => 09339351 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1462378 [patent_doc_number] => 06427180 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Queued port data controller for microprocessor-based engine control applications' [patent_app_type] => B1 [patent_app_number] => 09/337799 [patent_app_country] => US [patent_app_date] => 1999-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3725 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/427/06427180.pdf [firstpage_image] =>[orig_patent_app_number] => 09337799 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1513216 [patent_doc_number] => 06442641 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Handling multiple delayed write transactions simultaneously through a bridge' [patent_app_type] => B1 [patent_app_number] => 09/327986 [patent_app_country] => US [patent_app_date] => 1999-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3602 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/442/06442641.pdf [firstpage_image] =>[orig_patent_app_number] => 09327986 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1318953 [patent_doc_number] => 06618782 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-09 [patent_title] => 'Computer interconnection bus link layer' [patent_app_type] => B1 [patent_app_number] => 09/326304 [patent_app_country] => US [patent_app_date] => 1999-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 46 [patent_no_of_words] => 25159 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/618/06618782.pdf [firstpage_image] =>[orig_patent_app_number] => 09326304 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1365068 [patent_doc_number] => 06581125 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'PCI bridge having latency inducing serial bus' [patent_app_type] => B1 [patent_app_number] => 09/312206 [patent_app_country] => US [patent_app_date] => 1999-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6126 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/581/06581125.pdf [firstpage_image] =>[orig_patent_app_number] => 09312206 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1505919 [patent_doc_number] => 06487618 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-26 [patent_title] => 'Method for resisting an FPGA interface device' [patent_app_type] => B1 [patent_app_number] => 09/312316 [patent_app_country] => US [patent_app_date] => 1999-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 8353 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/487/06487618.pdf [firstpage_image] =>[orig_patent_app_number] => 09312316 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1406424 [patent_doc_number] => 06560665 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-06 [patent_title] => 'Embedding firmware for a microprocessor with configuration data for a field programmable gate array' [patent_app_type] => B1 [patent_app_number] => 09/312282 [patent_app_country] => US [patent_app_date] => 1999-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 8249 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/560/06560665.pdf [firstpage_image] =>[orig_patent_app_number] => 09312282 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1552735 [patent_doc_number] => 06446147 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Wired-or connection in differential transmission environment' [patent_app_type] => B1 [patent_app_number] => 09/311159 [patent_app_country] => US [patent_app_date] => 1999-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4504 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/446/06446147.pdf [firstpage_image] =>[orig_patent_app_number] => 09311159 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7644152 [patent_doc_number] => 06473822 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-29 [patent_title] => 'Digital signal processing apparatus' [patent_app_type] => B1 [patent_app_number] => 09/309433 [patent_app_country] => US [patent_app_date] => 1999-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6104 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/473/06473822.pdf [firstpage_image] =>[orig_patent_app_number] => 09309433 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1431372 [patent_doc_number] => 06519668 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-11 [patent_title] => 'Additional extension device having universal applicability' [patent_app_type] => B1 [patent_app_number] => 09/309595 [patent_app_country] => US [patent_app_date] => 1999-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3159 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/519/06519668.pdf [firstpage_image] =>[orig_patent_app_number] => 09309595 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7642405 [patent_doc_number] => 06430641 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Methods, arbiters, and computer program products that can improve the performance of a pipelined dual bus data processing system' [patent_app_type] => B1 [patent_app_number] => 09/304939 [patent_app_country] => US [patent_app_date] => 1999-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6403 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/430/06430641.pdf [firstpage_image] =>[orig_patent_app_number] => 09304939 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4298397 [patent_doc_number] => 06282601 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Multiprocessor data processing system and method of interrupt handling that facilitate identification of a processor requesting a system management interrupt' [patent_app_type] => 1 [patent_app_number] => 9/282332 [patent_app_country] => US [patent_app_date] => 1999-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3053 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/282/06282601.pdf [firstpage_image] =>[orig_patent_app_number] => 282332 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1584705 [patent_doc_number] => 06449678 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Method and system for multiple read/write transactions across a bridge system' [patent_app_type] => B1 [patent_app_number] => 09/275470 [patent_app_country] => US [patent_app_date] => 1999-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10904 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/449/06449678.pdf [firstpage_image] =>[orig_patent_app_number] => 09275470 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1602303 [patent_doc_number] => 06493827 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-10 [patent_title] => 'Method and system for monitoring configuration changes in a data processing system' [patent_app_type] => B1 [patent_app_number] => 09/271231 [patent_app_country] => US [patent_app_date] => 1999-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4823 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/493/06493827.pdf [firstpage_image] =>[orig_patent_app_number] => 09271231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7645929 [patent_doc_number] => 06477594 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-05 [patent_title] => 'Computer monitor with dual-purpose control switches, and method for providing screen-control switches on a computer monitor with different functions' [patent_app_type] => B1 [patent_app_number] => 09/264849 [patent_app_country] => US [patent_app_date] => 1999-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2096 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 11 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/477/06477594.pdf [firstpage_image] =>[orig_patent_app_number] => 09264849 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4422183 [patent_doc_number] => 06272575 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Modular digital assistant' [patent_app_type] => 1 [patent_app_number] => 9/259079 [patent_app_country] => US [patent_app_date] => 1999-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4123 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/272/06272575.pdf [firstpage_image] =>[orig_patent_app_number] => 259079 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1572271 [patent_doc_number] => 06378024 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-23 [patent_title] => 'Reduced microprocessor apparatus and method for device control system using impedance isolating expansion circuit' [patent_app_type] => B1 [patent_app_number] => 09/259903 [patent_app_country] => US [patent_app_date] => 1999-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4435 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/378/06378024.pdf [firstpage_image] =>[orig_patent_app_number] => 09259903 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4351682 [patent_doc_number] => 06314483 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Portable electronic device' [patent_app_type] => 1 [patent_app_number] => 9/250070 [patent_app_country] => US [patent_app_date] => 1999-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 74 [patent_no_of_words] => 11829 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/314/06314483.pdf [firstpage_image] =>[orig_patent_app_number] => 250070 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1415366 [patent_doc_number] => 06549963 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-15 [patent_title] => 'Method of configuring devices on a communications channel' [patent_app_type] => B1 [patent_app_number] => 09/248598 [patent_app_country] => US [patent_app_date] => 1999-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3772 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/549/06549963.pdf [firstpage_image] =>[orig_patent_app_number] => 09248598 [rel_patent_id] =>[rel_patent_doc_number] =>)