| Application number | Title of the application | Filing Date | Status |
|---|
| 08/253995 | DUAL FUNCTION INTERFACE FOR PCMCIA COMPATIBLE PERIPHERAL CARDS AND METHOD OF USE THEREIN | Jun 2, 1994 | Abandoned |
Array
(
[id] => 3564892
[patent_doc_number] => 05572735
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-05
[patent_title] => 'Method and apparatus for discharging the output voltage of a DC power supply'
[patent_app_type] => 1
[patent_app_number] => 8/250596
[patent_app_country] => US
[patent_app_date] => 1994-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4356
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 301
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/572/05572735.pdf
[firstpage_image] =>[orig_patent_app_number] => 250596
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/250596 | Method and apparatus for discharging the output voltage of a DC power supply | May 26, 1994 | Issued |
Array
(
[id] => 3531909
[patent_doc_number] => 05530812
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-25
[patent_title] => 'Bus interface circuit'
[patent_app_type] => 1
[patent_app_number] => 8/246057
[patent_app_country] => US
[patent_app_date] => 1994-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 1574
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 229
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/530/05530812.pdf
[firstpage_image] =>[orig_patent_app_number] => 246057
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/246057 | Bus interface circuit | May 18, 1994 | Issued |
Array
(
[id] => 3626095
[patent_doc_number] => 05535345
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-09
[patent_title] => 'Method and apparatus for sequencing misaligned external bus transactions in which the order of completion of corresponding split transaction requests is guaranteed'
[patent_app_type] => 1
[patent_app_number] => 8/241964
[patent_app_country] => US
[patent_app_date] => 1994-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 8395
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 211
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/535/05535345.pdf
[firstpage_image] =>[orig_patent_app_number] => 241964
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/241964 | Method and apparatus for sequencing misaligned external bus transactions in which the order of completion of corresponding split transaction requests is guaranteed | May 11, 1994 | Issued |
Array
(
[id] => 3575684
[patent_doc_number] => 05526496
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-11
[patent_title] => 'Method and apparatus for priority arbitration among devices in a computer system'
[patent_app_type] => 1
[patent_app_number] => 8/231310
[patent_app_country] => US
[patent_app_date] => 1994-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 7489
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 288
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/526/05526496.pdf
[firstpage_image] =>[orig_patent_app_number] => 231310
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/231310 | Method and apparatus for priority arbitration among devices in a computer system | Apr 21, 1994 | Issued |
Array
(
[id] => 3603409
[patent_doc_number] => 05586274
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-17
[patent_title] => 'Atomic operation control scheme'
[patent_app_type] => 1
[patent_app_number] => 8/217687
[patent_app_country] => US
[patent_app_date] => 1994-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 4271
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 256
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/586/05586274.pdf
[firstpage_image] =>[orig_patent_app_number] => 217687
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/217687 | Atomic operation control scheme | Mar 23, 1994 | Issued |
| 08/215585 | MEDICAL IMAGE PROCESSING APPARATUS | Mar 21, 1994 | Abandoned |
Array
(
[id] => 3116406
[patent_doc_number] => 05418715
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-23
[patent_title] => 'Method of electron beam radiotherapy'
[patent_app_type] => 1
[patent_app_number] => 8/213405
[patent_app_country] => US
[patent_app_date] => 1994-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 5043
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 285
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/418/05418715.pdf
[firstpage_image] =>[orig_patent_app_number] => 213405
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/213405 | Method of electron beam radiotherapy | Mar 14, 1994 | Issued |
| 08/187088 | COMPUTERIZED INVENTORY MONITORING AND VERIFICATION SYSTEM AND METHOD | Jan 25, 1994 | Abandoned |
| 08/160727 | X-RAY COMPUTERIZED TOMOGRAPHY APPARATUS | Dec 1, 1993 | Abandoned |
Array
(
[id] => 3505357
[patent_doc_number] => 05537553
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-16
[patent_title] => 'Method of and apparatus for bus control and data processor'
[patent_app_type] => 1
[patent_app_number] => 8/149810
[patent_app_country] => US
[patent_app_date] => 1993-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6536
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 378
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/537/05537553.pdf
[firstpage_image] =>[orig_patent_app_number] => 149810
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/149810 | Method of and apparatus for bus control and data processor | Nov 9, 1993 | Issued |
| 08/141471 | METHOD AND SYSTEM FOR SELECTIVE INCENTIVE POINT-OF-SALE MARKETING IN RESPONSE TO CUSTOMER SHOPPING HISTORIES | Oct 19, 1993 | Abandoned |
| 08/139983 | METHOD AND SYSTEM FOR SELECTIVE INCENTIVE POINT-OF-SALE MARKETING IN RESPONSE TO CUSTOMER SHOPPING HISTORIES | Oct 19, 1993 | Abandoned |
| 08/134071 | METHOD AND SYSTEM FOR SELECTIVE INCENTIVE POINT-OF-SALE MARKETING IN RESPONSE TO CUSTOMER SHOPPING HISTORIES | Oct 7, 1993 | Abandoned |
Array
(
[id] => 3569525
[patent_doc_number] => 05544331
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-06
[patent_title] => 'System and method for generating a read-modify-write operation'
[patent_app_type] => 1
[patent_app_number] => 8/128720
[patent_app_country] => US
[patent_app_date] => 1993-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3961
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/544/05544331.pdf
[firstpage_image] =>[orig_patent_app_number] => 128720
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/128720 | System and method for generating a read-modify-write operation | Sep 29, 1993 | Issued |
Array
(
[id] => 3507234
[patent_doc_number] => 05509125
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-16
[patent_title] => 'System and method for fair arbitration on a multi-domain multiprocessor bus'
[patent_app_type] => 1
[patent_app_number] => 8/128082
[patent_app_country] => US
[patent_app_date] => 1993-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 4842
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 219
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/509/05509125.pdf
[firstpage_image] =>[orig_patent_app_number] => 128082
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/128082 | System and method for fair arbitration on a multi-domain multiprocessor bus | Sep 28, 1993 | Issued |
| 08/124182 | SCALABLE SYSTEM INTERRUPT STRUCTURE FOR A MULTIPROCESSING SYSTEM | Sep 19, 1993 | Abandoned |
Array
(
[id] => 3420843
[patent_doc_number] => 05412563
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-02
[patent_title] => 'Gradient image segmentation method'
[patent_app_type] => 1
[patent_app_number] => 8/121628
[patent_app_country] => US
[patent_app_date] => 1993-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4507
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/412/05412563.pdf
[firstpage_image] =>[orig_patent_app_number] => 121628
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/121628 | Gradient image segmentation method | Sep 15, 1993 | Issued |
| 08/120245 | METHOD AND APPARATUS FOR SHARING HARDWARE RESOURCES IN A COMPUTER SYSTEM | Sep 12, 1993 | Abandoned |
Array
(
[id] => 3123073
[patent_doc_number] => 05465366
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-07
[patent_title] => 'Power control module for computer monitors'
[patent_app_type] => 1
[patent_app_number] => 8/117515
[patent_app_country] => US
[patent_app_date] => 1993-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2742
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/465/05465366.pdf
[firstpage_image] =>[orig_patent_app_number] => 117515
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/117515 | Power control module for computer monitors | Sep 2, 1993 | Issued |
