
Jerome Larry Leboeuf
Examiner (ID: 3880, Phone: (571)272-7612 , Office: P/2824 )
| Most Active Art Unit | 2824 |
| Art Unit(s) | 2824 |
| Total Applications | 617 |
| Issued Applications | 492 |
| Pending Applications | 62 |
| Abandoned Applications | 75 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
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[patent_title] => Multi-gate NOR flash thin-film transistor strings arranged in stacked horizontal active strips with vertical control gates
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[patent_title] => CAPACITIVE-COUPLED NON-VOLATILE THIN-FILM TRANSISTOR STRINGS IN THREE DIMENSIONAL ARRAYS
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Array
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Array
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