Search

Jerome Larry Leboeuf

Examiner (ID: 3880, Phone: (571)272-7612 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
617
Issued Applications
492
Pending Applications
62
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16850927 [patent_doc_number] => 20210151672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => MEMORY DEVICE WITH INCREASED ELECTRODE RESISTANCE TO REDUCE TRANSIENT SELECTION CURRENT [patent_app_type] => utility [patent_app_number] => 16/688309 [patent_app_country] => US [patent_app_date] => 2019-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8986 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16688309 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/688309
Memory device with increased electrode resistance to reduce transient selection current Nov 18, 2019 Issued
Array ( [id] => 16812536 [patent_doc_number] => 20210135091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => MEMORY DEVICE BASED ON MULTI-BIT PERPENDICULAR MAGNETIC TUNNEL JUNCTION [patent_app_type] => utility [patent_app_number] => 16/688510 [patent_app_country] => US [patent_app_date] => 2019-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9112 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16688510 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/688510
Memory device based on multi-bit perpendicular magnetic tunnel junction Nov 18, 2019 Issued
Array ( [id] => 15624955 [patent_doc_number] => 20200082882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/685885 [patent_app_country] => US [patent_app_date] => 2019-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16186 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16685885 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/685885
Resistive storage electronic device for adjusting voltage depending on temeperature Nov 14, 2019 Issued
Array ( [id] => 16880920 [patent_doc_number] => 11031076 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Memory circuit capable of implementing calculation operations [patent_app_type] => utility [patent_app_number] => 16/684987 [patent_app_country] => US [patent_app_date] => 2019-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 10128 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16684987 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/684987
Memory circuit capable of implementing calculation operations Nov 14, 2019 Issued
Array ( [id] => 15625663 [patent_doc_number] => 20200083236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => MEMORY CELL, MEMORY DEVICE, AND OPERATION METHOD OF MEMORY CELL [patent_app_type] => utility [patent_app_number] => 16/683140 [patent_app_country] => US [patent_app_date] => 2019-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8482 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16683140 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/683140
MEMORY CELL, MEMORY DEVICE, AND OPERATION METHOD OF MEMORY CELL Nov 12, 2019 Abandoned
Array ( [id] => 16928082 [patent_doc_number] => 11049571 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-29 [patent_title] => Semiconductor memory device for executing a read operation at high speed [patent_app_type] => utility [patent_app_number] => 16/681310 [patent_app_country] => US [patent_app_date] => 2019-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 32396 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16681310 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/681310
Semiconductor memory device for executing a read operation at high speed Nov 11, 2019 Issued
Array ( [id] => 17682353 [patent_doc_number] => 11366605 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-21 [patent_title] => Storage management system and method for storage migration services [patent_app_type] => utility [patent_app_number] => 16/670928 [patent_app_country] => US [patent_app_date] => 2019-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5923 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 372 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16670928 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/670928
Storage management system and method for storage migration services Oct 30, 2019 Issued
Array ( [id] => 16794976 [patent_doc_number] => 20210124793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => MEMORY CELL FOR DOT PRODUCT OPERATION IN COMPUTE-IN-MEMORY CHIP [patent_app_type] => utility [patent_app_number] => 16/666699 [patent_app_country] => US [patent_app_date] => 2019-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6069 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16666699 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/666699
Memory cell for dot product operation in compute-in-memory chip Oct 28, 2019 Issued
Array ( [id] => 17607680 [patent_doc_number] => 11336174 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Charge pump system with low ripple output voltage [patent_app_type] => utility [patent_app_number] => 16/657221 [patent_app_country] => US [patent_app_date] => 2019-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5279 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16657221 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/657221
Charge pump system with low ripple output voltage Oct 17, 2019 Issued
Array ( [id] => 15462211 [patent_doc_number] => 20200043930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => Thyristor Volatile Random Access Memory and Methods of Manufacture [patent_app_type] => utility [patent_app_number] => 16/596717 [patent_app_country] => US [patent_app_date] => 2019-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6576 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16596717 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/596717
Thyristor Volatile Random Access Memory and Methods of Manufacture Oct 7, 2019 Abandoned
Array ( [id] => 16752268 [patent_doc_number] => 20210104280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-08 [patent_title] => METHOD OF REDUCING NEIGHBORING WORD-LINE INTERFERENCE [patent_app_type] => utility [patent_app_number] => 16/593393 [patent_app_country] => US [patent_app_date] => 2019-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10551 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16593393 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/593393
METHOD OF REDUCING NEIGHBORING WORD-LINE INTERFERENCE Oct 3, 2019 Abandoned
Array ( [id] => 15938551 [patent_doc_number] => 20200160909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => NON-VOLATILE MEMORY CELL AND NON-VOLATILE CELL ARRAY [patent_app_type] => utility [patent_app_number] => 16/592951 [patent_app_country] => US [patent_app_date] => 2019-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5474 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592951 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/592951
Non-volatile memory cell and non-volatile cell array Oct 3, 2019 Issued
Array ( [id] => 16730893 [patent_doc_number] => 20210098041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => WRITE EFFICIENCY IN MAGNETO-RESISTIVE RANDOM ACCESS MEMORIES [patent_app_type] => utility [patent_app_number] => 16/586899 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18330 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586899 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/586899
Write efficiency in magneto-resistive random access memories Sep 26, 2019 Issued
Array ( [id] => 15369287 [patent_doc_number] => 20200020408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => MEMORY CIRCUIT, SYSTEM AND METHOD FOR RAPID RETRIEVAL OF DATA SETS [patent_app_type] => utility [patent_app_number] => 16/582996 [patent_app_country] => US [patent_app_date] => 2019-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32418 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16582996 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/582996
Memory circuit, system and method for rapid retrieval of data sets Sep 24, 2019 Issued
Array ( [id] => 16386244 [patent_doc_number] => 10811085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-20 [patent_title] => Dual rail device with power detector [patent_app_type] => utility [patent_app_number] => 16/580675 [patent_app_country] => US [patent_app_date] => 2019-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4268 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16580675 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/580675
Dual rail device with power detector Sep 23, 2019 Issued
Array ( [id] => 18433253 [patent_doc_number] => 11678495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Three-dimensional stacked phase change memory and preparation method thereof [patent_app_type] => utility [patent_app_number] => 17/043672 [patent_app_country] => US [patent_app_date] => 2019-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 5050 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 471 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17043672 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/043672
Three-dimensional stacked phase change memory and preparation method thereof Sep 22, 2019 Issued
Array ( [id] => 15836197 [patent_doc_number] => 20200133381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/575108 [patent_app_country] => US [patent_app_date] => 2019-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12137 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16575108 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/575108
Semiconductor device from transferring programs from a ROM to an SRAM Sep 17, 2019 Issued
Array ( [id] => 16566635 [patent_doc_number] => 10892009 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Magnetic wall utilization-analog memory element and magnetic wall utilization analog memory [patent_app_type] => utility [patent_app_number] => 16/571556 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 9998 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16571556 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/571556
Magnetic wall utilization-analog memory element and magnetic wall utilization analog memory Sep 15, 2019 Issued
Array ( [id] => 15328221 [patent_doc_number] => 20200004440 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => MEMORY DEVICE WITH DYNAMIC PROGRAM-VERIFY VOLTAGE CALIBRATION [patent_app_type] => utility [patent_app_number] => 16/566640 [patent_app_country] => US [patent_app_date] => 2019-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24102 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16566640 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/566640
Memory device with dynamic program-verify voltage calibration Sep 9, 2019 Issued
Array ( [id] => 16865605 [patent_doc_number] => 11024356 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-01 [patent_title] => Apparatus for low power write and read operations for resistive memory [patent_app_type] => utility [patent_app_number] => 16/565299 [patent_app_country] => US [patent_app_date] => 2019-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 10905 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16565299 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/565299
Apparatus for low power write and read operations for resistive memory Sep 8, 2019 Issued
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