Search

Jerome Larry Leboeuf

Examiner (ID: 3880, Phone: (571)272-7612 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
617
Issued Applications
492
Pending Applications
62
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17455890 [patent_doc_number] => 11270756 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Row hammer mitigation [patent_app_type] => utility [patent_app_number] => 16/553488 [patent_app_country] => US [patent_app_date] => 2019-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4466 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16553488 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/553488
Row hammer mitigation Aug 27, 2019 Issued
Array ( [id] => 15717141 [patent_doc_number] => 20200105338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => MEMORY CELL WITH CHARGE TRAP TRANSISTORS AND METHOD THEREOF CAPABLE OF STORING DATA BY TRAPPING OR DETRAPPING CHARGES [patent_app_type] => utility [patent_app_number] => 16/553109 [patent_app_country] => US [patent_app_date] => 2019-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1733 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16553109 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/553109
Memory cell with charge trap transistors and method thereof capable of storing data by trapping or detrapping charges Aug 26, 2019 Issued
Array ( [id] => 15259637 [patent_doc_number] => 20190378552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => Magnetic Memory Emulating Dynamic Random Access Memory (DRAM) [patent_app_type] => utility [patent_app_number] => 16/550103 [patent_app_country] => US [patent_app_date] => 2019-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8358 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16550103 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/550103
Magnetic Memory Emulating Dynamic Random Access Memory (DRAM) Aug 22, 2019 Abandoned
Array ( [id] => 15217395 [patent_doc_number] => 20190371384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => VIRTUAL GROUND SENSING CIRCUITRY AND RELATED DEVICES, SYSTEMS, AND METHODS FOR CROSSPOINT FERROELECTRIC MEMORY [patent_app_type] => utility [patent_app_number] => 16/540619 [patent_app_country] => US [patent_app_date] => 2019-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16506 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16540619 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/540619
Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory Aug 13, 2019 Issued
Array ( [id] => 16803091 [patent_doc_number] => 10998042 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Memory cells with tunneling materials including lanthanum oxide [patent_app_type] => utility [patent_app_number] => 16/539058 [patent_app_country] => US [patent_app_date] => 2019-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 13845 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16539058 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/539058
Memory cells with tunneling materials including lanthanum oxide Aug 12, 2019 Issued
Array ( [id] => 15184363 [patent_doc_number] => 20190362773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-28 [patent_title] => APPARATUSES AND METHODS FOR DATA TRANSMISSION OFFSET VALUES IN BURST TRANSMISSIONS [patent_app_type] => utility [patent_app_number] => 16/532017 [patent_app_country] => US [patent_app_date] => 2019-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6982 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16532017 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/532017
Apparatuses and methods for data transmission offset values in burst transmissions Aug 4, 2019 Issued
Array ( [id] => 15153889 [patent_doc_number] => 20190355422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => APPARATUSES AND METHODS FOR AUTOMATED DYNAMIC WORD LINE START VOLTAGE [patent_app_type] => utility [patent_app_number] => 16/530100 [patent_app_country] => US [patent_app_date] => 2019-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11062 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16530100 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/530100
Apparatuses and methods for automated dynamic word line start voltage Aug 1, 2019 Issued
Array ( [id] => 15122955 [patent_doc_number] => 20190348111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => RESISTANCE VARIABLE MEMORY SENSING USING PROGRAMMING SIGNALS [patent_app_type] => utility [patent_app_number] => 16/524416 [patent_app_country] => US [patent_app_date] => 2019-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6974 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16524416 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/524416
Resistance variable memory sensing using programming signals Jul 28, 2019 Issued
Array ( [id] => 15122921 [patent_doc_number] => 20190348094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => SEMICONDUCTOR DEVICES PERFORMING A WRITE LEVELING TRAINING OPERATION AND SEMICONDUCTOR SYSTEMS INCLUDING THE SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/523862 [patent_app_country] => US [patent_app_date] => 2019-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9134 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16523862 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/523862
Semiconductor devices performing a write leveling training operation and semiconductor systems including the semiconductor devices Jul 25, 2019 Issued
Array ( [id] => 15045129 [patent_doc_number] => 20190333569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => BROADCAST SYSTEM [patent_app_type] => utility [patent_app_number] => 16/508939 [patent_app_country] => US [patent_app_date] => 2019-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 37462 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16508939 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/508939
Semiconductor device for vector-matrix multiplication Jul 10, 2019 Issued
Array ( [id] => 17032545 [patent_doc_number] => 11094362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory [patent_app_type] => utility [patent_app_number] => 16/504814 [patent_app_country] => US [patent_app_date] => 2019-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 16568 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16504814 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/504814
Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory Jul 7, 2019 Issued
Array ( [id] => 16936950 [patent_doc_number] => 20210202839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => STACKED STRUCTURE AND METHOD OF MANUFACTURING SAME, AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/259111 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7237 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17259111 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/259111
STACKED STRUCTURE AND METHOD OF MANUFACTURING SAME, AND SEMICONDUCTOR DEVICE Jun 20, 2019 Abandoned
Array ( [id] => 16844621 [patent_doc_number] => 11016706 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Apparatuses for in-memory operations [patent_app_type] => utility [patent_app_number] => 16/440678 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 15827 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16440678 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/440678
Apparatuses for in-memory operations Jun 12, 2019 Issued
Array ( [id] => 16706707 [patent_doc_number] => 10956642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => Apparatuses and methods for measuring an electrical characteristic of a model signal line and providing measurement information [patent_app_type] => utility [patent_app_number] => 16/432632 [patent_app_country] => US [patent_app_date] => 2019-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 7840 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16432632 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/432632
Apparatuses and methods for measuring an electrical characteristic of a model signal line and providing measurement information Jun 4, 2019 Issued
Array ( [id] => 16148659 [patent_doc_number] => 10707411 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-07 [patent_title] => MRAM structure for efficient manufacturability [patent_app_type] => utility [patent_app_number] => 16/425366 [patent_app_country] => US [patent_app_date] => 2019-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4388 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16425366 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/425366
MRAM structure for efficient manufacturability May 28, 2019 Issued
Array ( [id] => 17599065 [patent_doc_number] => 20220148639 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => TRAINING FOR CHIP SELECT SIGNAL READ OPERATIONS BY MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/441667 [patent_app_country] => US [patent_app_date] => 2019-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17441667 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/441667
Training for chip select signal read operations by memory devices May 23, 2019 Issued
Array ( [id] => 15092565 [patent_doc_number] => 20190341094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => TECHNIQUES AND DEVICES FOR CANCELING MEMORY CELL VARIATIONS [patent_app_type] => utility [patent_app_number] => 16/420098 [patent_app_country] => US [patent_app_date] => 2019-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16376 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16420098 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/420098
Techniques and devices for canceling memory cell variations May 21, 2019 Issued
Array ( [id] => 17002376 [patent_doc_number] => 11081198 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Non-volatile memory with countermeasure for over programming [patent_app_type] => utility [patent_app_number] => 16/413891 [patent_app_country] => US [patent_app_date] => 2019-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 28 [patent_no_of_words] => 17540 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413891 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/413891
Non-volatile memory with countermeasure for over programming May 15, 2019 Issued
Array ( [id] => 16593646 [patent_doc_number] => 10902922 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Nonvolatile memory device storing data in sub-blocks and operating method thereof [patent_app_type] => utility [patent_app_number] => 16/412953 [patent_app_country] => US [patent_app_date] => 2019-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 7604 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16412953 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/412953
Nonvolatile memory device storing data in sub-blocks and operating method thereof May 14, 2019 Issued
Array ( [id] => 16455777 [patent_doc_number] => 20200365203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => SET/RESET METHODS FOR CRYSTALLIZATION IMPROVEMENT IN PHASE CHANGE MEMORIES [patent_app_type] => utility [patent_app_number] => 16/411479 [patent_app_country] => US [patent_app_date] => 2019-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14600 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411479 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/411479
Set/reset methods for crystallization improvement in phase change memories May 13, 2019 Issued
Menu