Search

Jerome Larry Leboeuf

Examiner (ID: 3880, Phone: (571)272-7612 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
617
Issued Applications
492
Pending Applications
62
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12691888 [patent_doc_number] => 20180122462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 15/699981 [patent_app_country] => US [patent_app_date] => 2017-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16191 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15699981 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/699981
Electronic device with a reference resistance adjustment block Sep 7, 2017 Issued
Array ( [id] => 13451349 [patent_doc_number] => 20180277217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-27 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/694843 [patent_app_country] => US [patent_app_date] => 2017-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10399 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15694843 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/694843
Semiconductor memory device for providing different voltages to grouped memory blocks Sep 2, 2017 Issued
Array ( [id] => 12778150 [patent_doc_number] => 20180151218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-31 [patent_title] => METHOD OF OPERATING MEMORY DEVICE AND METHOD OF OPERATING MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 15/691828 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12619 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15691828 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/691828
Method of refreshing memory device and memory system based on storage capacity Aug 30, 2017 Issued
Array ( [id] => 15233703 [patent_doc_number] => 10504580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-10 [patent_title] => Systems and methods for refreshing a memory bank while accessing another memory bank using a shared address path [patent_app_type] => utility [patent_app_number] => 15/692804 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 13944 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15692804 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/692804
Systems and methods for refreshing a memory bank while accessing another memory bank using a shared address path Aug 30, 2017 Issued
Array ( [id] => 14671519 [patent_doc_number] => 10373674 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Apparatuses and methods for data transmission offset values in burst transmissions [patent_app_type] => utility [patent_app_number] => 15/692937 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6949 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15692937 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/692937
Apparatuses and methods for data transmission offset values in burst transmissions Aug 30, 2017 Issued
Array ( [id] => 13995207 [patent_doc_number] => 20190066761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => PROCESSING IN MEMORY [patent_app_type] => utility [patent_app_number] => 15/693366 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14682 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15693366 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/693366
Processing in memory device including a row address strobe manager Aug 30, 2017 Issued
Array ( [id] => 14555263 [patent_doc_number] => 10346092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Apparatuses and methods for in-memory operations using timing circuitry [patent_app_type] => utility [patent_app_number] => 15/693390 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 15797 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15693390 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/693390
Apparatuses and methods for in-memory operations using timing circuitry Aug 30, 2017 Issued
Array ( [id] => 15109339 [patent_doc_number] => 10476002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Method for thermally treating semiconductor structure before saving data [patent_app_type] => utility [patent_app_number] => 15/690353 [patent_app_country] => US [patent_app_date] => 2017-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5058 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15690353 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/690353
Method for thermally treating semiconductor structure before saving data Aug 29, 2017 Issued
Array ( [id] => 13708731 [patent_doc_number] => 20170365320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-21 [patent_title] => VIRTUAL GROUND SENSING CIRCUITRY AND RELATED DEVICES, SYSTEMS, AND METHODS FOR CROSSPOINT FERROELECTRIC MEMORY [patent_app_type] => utility [patent_app_number] => 15/674050 [patent_app_country] => US [patent_app_date] => 2017-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16443 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15674050 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/674050
Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory Aug 9, 2017 Issued
Array ( [id] => 14332559 [patent_doc_number] => 10297303 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory [patent_app_type] => utility [patent_app_number] => 15/674019 [patent_app_country] => US [patent_app_date] => 2017-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 16459 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15674019 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/674019
Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory Aug 9, 2017 Issued
Array ( [id] => 14298831 [patent_doc_number] => 10289542 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-14 [patent_title] => Apparatuses and methods for memory device as a store for block program instructions [patent_app_type] => utility [patent_app_number] => 15/669590 [patent_app_country] => US [patent_app_date] => 2017-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11251 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15669590 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/669590
Apparatuses and methods for memory device as a store for block program instructions Aug 3, 2017 Issued
Array ( [id] => 12033792 [patent_doc_number] => 20170323891 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-09 [patent_title] => 'Thyristor Volatile Random Access Memory and Methods of Manufacture' [patent_app_type] => utility [patent_app_number] => 15/658346 [patent_app_country] => US [patent_app_date] => 2017-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6836 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15658346 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/658346
Method of writing into and refreshing a thyristor volatile random access memory Jul 23, 2017 Issued
Array ( [id] => 14644001 [patent_doc_number] => 10366748 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-30 [patent_title] => Resistance variable memory sensing using programming signals [patent_app_type] => utility [patent_app_number] => 15/635814 [patent_app_country] => US [patent_app_date] => 2017-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6946 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15635814 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/635814
Resistance variable memory sensing using programming signals Jun 27, 2017 Issued
Array ( [id] => 11997237 [patent_doc_number] => 20170301391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-19 [patent_title] => 'BROADCAST SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/634013 [patent_app_country] => US [patent_app_date] => 2017-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 39226 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15634013 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/634013
Semiconductor device including memory cells Jun 26, 2017 Issued
Array ( [id] => 13610863 [patent_doc_number] => 20180356981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => MULTI-CHANNEL NONVOLATILE MEMORY POWER LOSS MANAGEMENT [patent_app_type] => utility [patent_app_number] => 15/616048 [patent_app_country] => US [patent_app_date] => 2017-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5687 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15616048 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/616048
Multi-channel nonvolatile memory power loss management Jun 6, 2017 Issued
Array ( [id] => 15108387 [patent_doc_number] => 10475523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Updating read voltages triggered by the rate of temperature change [patent_app_type] => utility [patent_app_number] => 15/615175 [patent_app_country] => US [patent_app_date] => 2017-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 31036 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15615175 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/615175
Updating read voltages triggered by the rate of temperature change Jun 5, 2017 Issued
Array ( [id] => 14267275 [patent_doc_number] => 10283207 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-07 [patent_title] => Non-volatile memory devices comprising high voltage generation circuits and operating methods thereof [patent_app_type] => utility [patent_app_number] => 15/611171 [patent_app_country] => US [patent_app_date] => 2017-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 10080 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15611171 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/611171
Non-volatile memory devices comprising high voltage generation circuits and operating methods thereof May 31, 2017 Issued
Array ( [id] => 14011201 [patent_doc_number] => 10224072 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-05 [patent_title] => Error detection code hold pattern synchronization [patent_app_type] => utility [patent_app_number] => 15/606185 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3631 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15606185 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/606185
Error detection code hold pattern synchronization May 25, 2017 Issued
Array ( [id] => 13201081 [patent_doc_number] => 10115461 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-10-30 [patent_title] => Electronic device using resistive memory element and a recovery operation to compensate for threshold drift [patent_app_type] => utility [patent_app_number] => 15/605603 [patent_app_country] => US [patent_app_date] => 2017-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 9881 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15605603 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/605603
Electronic device using resistive memory element and a recovery operation to compensate for threshold drift May 24, 2017 Issued
Array ( [id] => 13579733 [patent_doc_number] => 20180341415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-29 [patent_title] => MEMORY DEVICE WITH DYNAMIC PROGRAM-VERIFY VOLTAGE CALIBRATION [patent_app_type] => utility [patent_app_number] => 15/605855 [patent_app_country] => US [patent_app_date] => 2017-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24065 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15605855 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/605855
Memory device with dynamic program-verify voltage calibration May 24, 2017 Issued
Menu