| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 12167570
[patent_doc_number] => 09886339
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-02-06
[patent_title] => 'Semiconductor device using fuse arrays to store weak cell addresses'
[patent_app_type] => utility
[patent_app_number] => 15/244363
[patent_app_country] => US
[patent_app_date] => 2016-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4915
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15244363
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/244363 | Semiconductor device using fuse arrays to store weak cell addresses | Aug 22, 2016 | Issued |
Array
(
[id] => 14267221
[patent_doc_number] => 10283180
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-05-07
[patent_title] => Nonvolatile resistance changing semiconductor memory using first and second writing operations
[patent_app_type] => utility
[patent_app_number] => 15/232956
[patent_app_country] => US
[patent_app_date] => 2016-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 51
[patent_no_of_words] => 11975
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 297
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15232956
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/232956 | Nonvolatile resistance changing semiconductor memory using first and second writing operations | Aug 9, 2016 | Issued |
Array
(
[id] => 11424703
[patent_doc_number] => 20170032848
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-02-02
[patent_title] => 'DIELECTRIC FUSE MEMORY CIRCUIT AND OPERATION METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 15/222983
[patent_app_country] => US
[patent_app_date] => 2016-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 8064
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15222983
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/222983 | Dielectric fuse memory circuit and operation method thereof | Jul 28, 2016 | Issued |
Array
(
[id] => 11532392
[patent_doc_number] => 20170092370
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-30
[patent_title] => 'MULTI-GATE NOR FLASH THIN-FILM TRANSISTOR STRINGS ARRANGED IN STACKED HORIZONTAL ACTIVE STRIPS WITH VERTICAL CONTROL GATES'
[patent_app_type] => utility
[patent_app_number] => 15/220375
[patent_app_country] => US
[patent_app_date] => 2016-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 12976
[patent_no_of_claims] => 58
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15220375
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/220375 | Multi-gate NOR flash thin-film transistor strings arranged in stacked horizontal active strips with vertical control gates | Jul 25, 2016 | Issued |
Array
(
[id] => 11532868
[patent_doc_number] => 20170092848
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-30
[patent_title] => 'MAGNETIC MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/210627
[patent_app_country] => US
[patent_app_date] => 2016-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 11369
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15210627
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/210627 | MAGNETIC MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME | Jul 13, 2016 | Abandoned |
Array
(
[id] => 11911326
[patent_doc_number] => 09780147
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-10-03
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 15/209164
[patent_app_country] => US
[patent_app_date] => 2016-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 38
[patent_no_of_words] => 13216
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 342
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15209164
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/209164 | Semiconductor memory device | Jul 12, 2016 | Issued |
Array
(
[id] => 11495647
[patent_doc_number] => 20170069832
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-09
[patent_title] => 'MAGNETORESISTIVE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/186420
[patent_app_country] => US
[patent_app_date] => 2016-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 13912
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15186420
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/186420 | MAGNETORESISTIVE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME | Jun 16, 2016 | Abandoned |
| 15/185812 | MRAM STRUCTURE FOR EFFICIENT MANUFACTURABILITY | Jun 16, 2016 | Abandoned |
Array
(
[id] => 11070999
[patent_doc_number] => 20160267963
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-09-15
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/162321
[patent_app_country] => US
[patent_app_date] => 2016-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 9387
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15162321
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/162321 | Static semiconductor memory device using a single global data line | May 22, 2016 | Issued |
Array
(
[id] => 12573345
[patent_doc_number] => 10020039
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-10
[patent_title] => Three terminal magnetoresistive devices, magnetoresistive random access memory and magnetic recording method
[patent_app_type] => utility
[patent_app_number] => 15/144715
[patent_app_country] => US
[patent_app_date] => 2016-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 42
[patent_no_of_words] => 13643
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15144715
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/144715 | Three terminal magnetoresistive devices, magnetoresistive random access memory and magnetic recording method | May 1, 2016 | Issued |
Array
(
[id] => 12026712
[patent_doc_number] => 20170316811
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-02
[patent_title] => 'OPERATION OF VOLTAGE REGULATOR FOR SUBSYSTEM IN CONSTANT CURRENT MODE AND THEN IN CONSTANT VOLTAGE MODE'
[patent_app_type] => utility
[patent_app_number] => 15/142800
[patent_app_country] => US
[patent_app_date] => 2016-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3496
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15142800
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/142800 | OPERATION OF VOLTAGE REGULATOR FOR SUBSYSTEM IN CONSTANT CURRENT MODE AND THEN IN CONSTANT VOLTAGE MODE | Apr 28, 2016 | Abandoned |
Array
(
[id] => 11592913
[patent_doc_number] => 20170117325
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-04-27
[patent_title] => 'ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/141072
[patent_app_country] => US
[patent_app_date] => 2016-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 11298
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15141072
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/141072 | ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME | Apr 27, 2016 | Abandoned |
Array
(
[id] => 12026721
[patent_doc_number] => 20170316819
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-02
[patent_title] => 'MEMORY MACRO AND METHOD OF OPERATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/140726
[patent_app_country] => US
[patent_app_date] => 2016-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 10728
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15140726
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/140726 | Memory macro disableable input-output circuits and methods of operating the same | Apr 27, 2016 | Issued |
Array
(
[id] => 11876200
[patent_doc_number] => 09747980
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-29
[patent_title] => 'Semiconductor memory device and method for temperature compensation using temperature-resistance-voltage functions'
[patent_app_type] => utility
[patent_app_number] => 15/139367
[patent_app_country] => US
[patent_app_date] => 2016-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 15
[patent_no_of_words] => 3959
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 228
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15139367
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/139367 | Semiconductor memory device and method for temperature compensation using temperature-resistance-voltage functions | Apr 26, 2016 | Issued |
Array
(
[id] => 13214341
[patent_doc_number] => 10121545
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-11-06
[patent_title] => Semiconductor memory device and operating method for inhibiting programming
[patent_app_type] => utility
[patent_app_number] => 15/130593
[patent_app_country] => US
[patent_app_date] => 2016-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 15
[patent_no_of_words] => 13844
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15130593
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/130593 | Semiconductor memory device and operating method for inhibiting programming | Apr 14, 2016 | Issued |
Array
(
[id] => 11673532
[patent_doc_number] => 20170162255
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-08
[patent_title] => 'LOW RESISTANCE POWER HEADER WITH REDUCED INSTANTANEOUS VOLTAGE DROP'
[patent_app_type] => utility
[patent_app_number] => 15/096273
[patent_app_country] => US
[patent_app_date] => 2016-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4537
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15096273
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/096273 | LOW RESISTANCE POWER HEADER WITH REDUCED INSTANTANEOUS VOLTAGE DROP | Apr 10, 2016 | Abandoned |
Array
(
[id] => 11983386
[patent_doc_number] => 20170287541
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-05
[patent_title] => 'CHARGE EXTRACTION FROM FERROELECTRIC MEMORY CELL'
[patent_app_type] => utility
[patent_app_number] => 15/090789
[patent_app_country] => US
[patent_app_date] => 2016-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 12708
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15090789
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/090789 | Charge extraction from ferroelectric memory cell using sense capacitors | Apr 4, 2016 | Issued |
Array
(
[id] => 11019958
[patent_doc_number] => 20160216910
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-07-28
[patent_title] => 'Solving MLC NAND paired page program using reduced spatial redundancy'
[patent_app_type] => utility
[patent_app_number] => 15/089601
[patent_app_country] => US
[patent_app_date] => 2016-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 18535
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15089601
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/089601 | Solving MLC NAND paired page program using reduced spatial redundancy | Apr 3, 2016 | Abandoned |
Array
(
[id] => 10991830
[patent_doc_number] => 20160188775
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-30
[patent_title] => 'APPARATUSES AND METHODS FOR MEASURING AN ELECTRICAL CHARACTERISTIC OF A MODEL SIGNAL LINE AND PROVIDING MEASUREMENT INFORMATION'
[patent_app_type] => utility
[patent_app_number] => 15/061559
[patent_app_country] => US
[patent_app_date] => 2016-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7951
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15061559
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/061559 | Apparatuses and methods for measuring an electrical characteristic of a model signal line and providing measurement information | Mar 3, 2016 | Issued |
Array
(
[id] => 11473700
[patent_doc_number] => 20170060482
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-02
[patent_title] => 'MEMORY SYSTEM AND METHOD OF CONTROLLING NONVOLATILE MEMORY'
[patent_app_type] => utility
[patent_app_number] => 15/059467
[patent_app_country] => US
[patent_app_date] => 2016-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 8766
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15059467
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/059467 | Memory system and method of controlling nonvolatile memory by converting write data written to a page | Mar 2, 2016 | Issued |