Search

Jerome Larry Leboeuf

Examiner (ID: 3880, Phone: (571)272-7612 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
617
Issued Applications
492
Pending Applications
62
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10433028 [patent_doc_number] => 20150318039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-05 [patent_title] => 'NONVOLATILE MEMORY APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/797247 [patent_app_country] => US [patent_app_date] => 2015-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10974 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14797247 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/797247
Non-volatile memory apparatus sensing current changing according to data stored in memory cell Jul 12, 2015 Issued
Array ( [id] => 12334143 [patent_doc_number] => 09947381 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-17 [patent_title] => Self-referenced multibit MRAM cell having a synthetic antiferromagnetic storage layer [patent_app_type] => utility [patent_app_number] => 15/318715 [patent_app_country] => US [patent_app_date] => 2015-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 4711 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15318715 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/318715
Self-referenced multibit MRAM cell having a synthetic antiferromagnetic storage layer May 27, 2015 Issued
Array ( [id] => 11079068 [patent_doc_number] => 20160276033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'NONVOLATILE MEMORY DEVICE, OPERATING METHOD THEREOF, AND TEST SYSTEM HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/722796 [patent_app_country] => US [patent_app_date] => 2015-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6383 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14722796 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/722796
Nonvolatile memory device, operating method thereof, and test system for optimizing erase loop operations May 26, 2015 Issued
Array ( [id] => 10464011 [patent_doc_number] => 20150349026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'ELECTRONIC MEMORY USING MEMRISTORS AND CROSSBARS' [patent_app_type] => utility [patent_app_number] => 14/720714 [patent_app_country] => US [patent_app_date] => 2015-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4442 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14720714 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/720714
Electronic memory using memristors and crossbars with three or more in-series activated memristors May 21, 2015 Issued
Array ( [id] => 10479173 [patent_doc_number] => 20150364190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-17 [patent_title] => 'REFRESH OF A MEMORY AREA OF A NON-VOLATILE MEMORY UNIT' [patent_app_type] => utility [patent_app_number] => 14/718343 [patent_app_country] => US [patent_app_date] => 2015-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4302 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14718343 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/718343
Periodic refresh of a memory area of a non-volatile memory unit using refresh triggers May 20, 2015 Issued
Array ( [id] => 11918155 [patent_doc_number] => 09786346 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-10 [patent_title] => 'Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory' [patent_app_type] => utility [patent_app_number] => 14/717471 [patent_app_country] => US [patent_app_date] => 2015-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 17703 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14717471 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/717471
Virtual ground sensing circuitry and related devices, systems, and methods for crosspoint ferroelectric memory May 19, 2015 Issued
Array ( [id] => 10983992 [patent_doc_number] => 20160180936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-23 [patent_title] => 'MEMORY SYSTEM AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/716608 [patent_app_country] => US [patent_app_date] => 2015-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12435 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14716608 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/716608
Programming dummy data into bad pages of a memory system and operating method thereof May 18, 2015 Issued
Array ( [id] => 12968698 [patent_doc_number] => 09875800 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-23 [patent_title] => 3D NAND semiconductor device for erasing groups of bit lines [patent_app_type] => utility [patent_app_number] => 14/691827 [patent_app_country] => US [patent_app_date] => 2015-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 8452 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14691827 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/691827
3D NAND semiconductor device for erasing groups of bit lines Apr 20, 2015 Issued
Array ( [id] => 10764991 [patent_doc_number] => 20160111146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-21 [patent_title] => 'CELL STRUCTURE OF RANDOM ACCESS MEMORY, RANDOM ACCESS MEMORY AND OPERATION METHODS' [patent_app_type] => utility [patent_app_number] => 14/772371 [patent_app_country] => US [patent_app_date] => 2015-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10849 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14772371 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/772371
Cell structure of 4T random access memory, random access memory and operation methods Apr 16, 2015 Issued
Array ( [id] => 11050612 [patent_doc_number] => 20160247571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND PRODUCTION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/687177 [patent_app_country] => US [patent_app_date] => 2015-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5518 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14687177 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/687177
Semiconductor memory device using grounded dummy bit lines Apr 14, 2015 Issued
Array ( [id] => 11453000 [patent_doc_number] => 09576649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-21 [patent_title] => 'Charge loss compensation through augmentation of accumulated charge in a memory cell' [patent_app_type] => utility [patent_app_number] => 14/675056 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 6155 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14675056 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/675056
Charge loss compensation through augmentation of accumulated charge in a memory cell Mar 30, 2015 Issued
Array ( [id] => 11087446 [patent_doc_number] => 20160284413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'PAGE ERASE IN FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 14/668728 [patent_app_country] => US [patent_app_date] => 2015-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13050 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14668728 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/668728
Sub-block page erase in 3D p-channel flash memory Mar 24, 2015 Issued
Array ( [id] => 11087425 [patent_doc_number] => 20160284392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'MEMORY CELL, MEMORY DEVICE INCLUDING A PLURALITY OF MEMORY CELLS AND METHOD INCLUDING READ AND WRITE OPERATIONS AT A MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 14/666420 [patent_app_country] => US [patent_app_date] => 2015-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8143 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14666420 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/666420
MEMORY CELL, MEMORY DEVICE INCLUDING A PLURALITY OF MEMORY CELLS AND METHOD INCLUDING READ AND WRITE OPERATIONS AT A MEMORY CELL Mar 23, 2015 Abandoned
Array ( [id] => 11070990 [patent_doc_number] => 20160267954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'REDUCED LOAD MEMORY MODULE' [patent_app_type] => utility [patent_app_number] => 14/645811 [patent_app_country] => US [patent_app_date] => 2015-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8125 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14645811 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/645811
Reduced load memory module using wire bonds and a plurality of rank signals Mar 11, 2015 Issued
Array ( [id] => 11738944 [patent_doc_number] => 09703526 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-11 [patent_title] => 'Self-stuffing multi-clock FIFO requiring no synchronizers' [patent_app_type] => utility [patent_app_number] => 14/656300 [patent_app_country] => US [patent_app_date] => 2015-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 10371 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14656300 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/656300
Self-stuffing multi-clock FIFO requiring no synchronizers Mar 11, 2015 Issued
Array ( [id] => 12293463 [patent_doc_number] => 09934840 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-03 [patent_title] => Method and circuit enabling ferroelectric memory to be fixed to a stable state [patent_app_type] => utility [patent_app_number] => 14/642375 [patent_app_country] => US [patent_app_date] => 2015-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3782 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14642375 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/642375
Method and circuit enabling ferroelectric memory to be fixed to a stable state Mar 8, 2015 Issued
Array ( [id] => 14300443 [patent_doc_number] => 10290352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-14 [patent_title] => System, apparatus, and method of programming a one-time programmable memory circuit having dual programming regions [patent_app_type] => utility [patent_app_number] => 14/633793 [patent_app_country] => US [patent_app_date] => 2015-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6041 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14633793 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/633793
System, apparatus, and method of programming a one-time programmable memory circuit having dual programming regions Feb 26, 2015 Issued
Array ( [id] => 11966850 [patent_doc_number] => 20170271003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'DETERMINING RESISTANCE STATES OF MEMRISTORS IN A CROSSBAR ARRAY' [patent_app_type] => utility [patent_app_number] => 15/500051 [patent_app_country] => US [patent_app_date] => 2015-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 12652 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15500051 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/500051
Determining resistance states of memristors in a crossbar array Feb 23, 2015 Issued
Array ( [id] => 10718305 [patent_doc_number] => 20160064452 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-03 [patent_title] => 'MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/594782 [patent_app_country] => US [patent_app_date] => 2015-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 17324 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14594782 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/594782
MEMORY DEVICE Jan 11, 2015
Array ( [id] => 11791579 [patent_doc_number] => 09401219 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-26 [patent_title] => 'Electronic fuse semiconductor device for selecting failed redundancy word lines' [patent_app_type] => utility [patent_app_number] => 14/586007 [patent_app_country] => US [patent_app_date] => 2014-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7372 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14586007 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/586007
Electronic fuse semiconductor device for selecting failed redundancy word lines Dec 29, 2014 Issued
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