Search

Jerome Larry Leboeuf

Examiner (ID: 3880, Phone: (571)272-7612 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
617
Issued Applications
492
Pending Applications
62
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20113413 [patent_doc_number] => 12364170 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Resistive memory devices using a carbon-based conductor line and methods for forming the same [patent_app_type] => utility [patent_app_number] => 18/413107 [patent_app_country] => US [patent_app_date] => 2024-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 53 [patent_no_of_words] => 6794 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18413107 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/413107
Resistive memory devices using a carbon-based conductor line and methods for forming the same Jan 15, 2024 Issued
Array ( [id] => 20649712 [patent_doc_number] => 12604675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-14 [patent_title] => Self-aligned heater for PCRAM using a continuous dielectric [patent_app_type] => utility [patent_app_number] => 18/411254 [patent_app_country] => US [patent_app_date] => 2024-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 2226 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18411254 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/411254
Self-aligned heater for PCRAM using a continuous dielectric Jan 11, 2024 Issued
Array ( [id] => 19308775 [patent_doc_number] => 20240237358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => IMPROVED VERTICAL 3D MEMORY DEVICE AND ACCESSING METHOD [patent_app_type] => utility [patent_app_number] => 18/407074 [patent_app_country] => US [patent_app_date] => 2024-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16123 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18407074 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/407074
IMPROVED VERTICAL 3D MEMORY DEVICE AND ACCESSING METHOD Jan 7, 2024 Pending
Array ( [id] => 19269047 [patent_doc_number] => 20240212751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => IN-MEMORY COMPUTATION DEVICE HAVING AN IMPROVED CURRENT READING CIRCUIT AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/543847 [patent_app_country] => US [patent_app_date] => 2023-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13969 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18543847 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/543847
In-memory computation device having an improved current reading circuit and control method Dec 17, 2023 Issued
Array ( [id] => 20273892 [patent_doc_number] => 12443675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => Crossbar circuits for performing convolution operations [patent_app_type] => utility [patent_app_number] => 18/517320 [patent_app_country] => US [patent_app_date] => 2023-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 4061 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18517320 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/517320
Crossbar circuits for performing convolution operations Nov 21, 2023 Issued
Array ( [id] => 19191148 [patent_doc_number] => 20240170061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => HALIDE PEROVSKITE OPTICAL STORAGE AND MEMORY ARRAYS [patent_app_type] => utility [patent_app_number] => 18/517238 [patent_app_country] => US [patent_app_date] => 2023-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4321 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18517238 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/517238
HALIDE PEROVSKITE OPTICAL STORAGE AND MEMORY ARRAYS Nov 21, 2023 Pending
Array ( [id] => 19175830 [patent_doc_number] => 20240161804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => Memory System Having Combined High Density, Low Bandwidth and Low Density, High Bandwidth Memories [patent_app_type] => utility [patent_app_number] => 18/515649 [patent_app_country] => US [patent_app_date] => 2023-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5323 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18515649 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/515649
Memory system having combined high density, low bandwidth and low density, high bandwidth memories Nov 20, 2023 Issued
Array ( [id] => 19618919 [patent_doc_number] => 20240404599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => MEMORY DEVICE RELATED TO PERFORMING A READ OPERATION AND METHOD OF OPERATING THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/514642 [patent_app_country] => US [patent_app_date] => 2023-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4461 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18514642 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/514642
MEMORY DEVICE RELATED TO PERFORMING A READ OPERATION AND METHOD OF OPERATING THE MEMORY DEVICE Nov 19, 2023 Pending
Array ( [id] => 20635621 [patent_doc_number] => 12596495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-07 [patent_title] => Power saving during open block read with large block openness [patent_app_type] => utility [patent_app_number] => 18/389439 [patent_app_country] => US [patent_app_date] => 2023-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 36 [patent_no_of_words] => 14139 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18389439 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/389439
Power saving during open block read with large block openness Nov 13, 2023 Issued
Array ( [id] => 20806046 [patent_doc_number] => 12670958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-30 [patent_title] => Execution of prologue sub-operations of a programming operation during data loading [patent_app_type] => utility [patent_app_number] => 18/388930 [patent_app_country] => US [patent_app_date] => 2023-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4447 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18388930 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/388930
Execution of prologue sub-operations of a programming operation during data loading Nov 12, 2023 Issued
Array ( [id] => 20648186 [patent_doc_number] => 12603136 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-14 [patent_title] => Three-dimensional NOR memory structure with resistive memory cells [patent_app_type] => utility [patent_app_number] => 18/388164 [patent_app_country] => US [patent_app_date] => 2023-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 4513 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 344 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18388164 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/388164
Three-dimensional NOR memory structure with resistive memory cells Nov 7, 2023 Issued
Array ( [id] => 18990869 [patent_doc_number] => 20240062838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => METHODS FOR REDUCING DISTURB ERRORS BY REFRESHING DATA ALONGSIDE PROGRAMMING OR ERASE OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/497402 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6764 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18497402 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/497402
Methods for reducing disturb errors by refreshing data alongside programming or erase operations Oct 29, 2023 Issued
Array ( [id] => 19986757 [patent_doc_number] => 20250124979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => CONTROL DEVICE FOR CONTROLLING MEMORY DEVICE AND METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/484513 [patent_app_country] => US [patent_app_date] => 2023-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 619 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18484513 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/484513
Controlling memory device using group recovery times and method thereof Oct 10, 2023 Issued
Array ( [id] => 20470956 [patent_doc_number] => 12527001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Ferroelectric nanoparticle capacitor for non-binary logics and method of operation [patent_app_type] => utility [patent_app_number] => 18/376762 [patent_app_country] => US [patent_app_date] => 2023-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 45 [patent_no_of_words] => 12671 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18376762 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/376762
Ferroelectric nanoparticle capacitor for non-binary logics and method of operation Oct 3, 2023 Issued
Array ( [id] => 19783276 [patent_doc_number] => 12232331 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Memory devices with selector layer and methods of forming the same [patent_app_type] => utility [patent_app_number] => 18/479836 [patent_app_country] => US [patent_app_date] => 2023-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5375 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18479836 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/479836
Memory devices with selector layer and methods of forming the same Oct 2, 2023 Issued
Array ( [id] => 18926799 [patent_doc_number] => 20240029803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => MULTI-GATE NOR FLASH THIN-FILM TRANSISTOR STRINGS ARRANGED IN STACKED HORIZONTAL ACTIVE STRIPS WITH VERTICAL CONTROL GATES [patent_app_type] => utility [patent_app_number] => 18/375869 [patent_app_country] => US [patent_app_date] => 2023-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12144 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18375869 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/375869
Multi-gate nor flash thin-film transistor strings arranged in stacked horizontal active strips with vertical control gates Oct 1, 2023 Issued
Array ( [id] => 19461408 [patent_doc_number] => 12101942 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Semiconductor device including chalcogen compound and semiconductor apparatus including the same [patent_app_type] => utility [patent_app_number] => 18/478776 [patent_app_country] => US [patent_app_date] => 2023-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 10099 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18478776 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/478776
Semiconductor device including chalcogen compound and semiconductor apparatus including the same Sep 28, 2023 Issued
Array ( [id] => 19878398 [patent_doc_number] => 20250110655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => Efficient Memory Operation Using a Destructive Read Memory Array [patent_app_type] => utility [patent_app_number] => 18/477272 [patent_app_country] => US [patent_app_date] => 2023-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9166 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18477272 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/477272
Efficient memory operation using a destructive read memory array Sep 27, 2023 Issued
Array ( [id] => 19687714 [patent_doc_number] => 20250006259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => SEMICONDUCTOR DEVICE, OPERATING METHOD OF THE SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/476939 [patent_app_country] => US [patent_app_date] => 2023-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6679 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18476939 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/476939
SEMICONDUCTOR DEVICE, OPERATING METHOD OF THE SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE Sep 27, 2023 Pending
Array ( [id] => 19964651 [patent_doc_number] => 12334166 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Data integrity checks based on voltage distribution metrics [patent_app_type] => utility [patent_app_number] => 18/373741 [patent_app_country] => US [patent_app_date] => 2023-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4840 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18373741 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/373741
Data integrity checks based on voltage distribution metrics Sep 26, 2023 Issued
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