Search

Jerome Larry Leboeuf

Examiner (ID: 3880, Phone: (571)272-7612 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
617
Issued Applications
492
Pending Applications
62
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19145986 [patent_doc_number] => 20240145001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/467094 [patent_app_country] => US [patent_app_date] => 2023-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11409 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 509 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18467094 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/467094
Memory device determining target resistance states Sep 13, 2023 Issued
Array ( [id] => 19502188 [patent_doc_number] => 20240341206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/460437 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8135 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18460437 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/460437
Semiconductor device with a selector layer Aug 31, 2023 Issued
Array ( [id] => 19500137 [patent_doc_number] => 20240339155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/460473 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7629 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18460473 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/460473
Semiconductor device with selectively coupled resistors in conduction paths Aug 31, 2023 Issued
Array ( [id] => 20897704 [patent_doc_number] => 12704969 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-08-11 [patent_title] => Asymmetric pass through voltage for reduction of cell-to-cell interference [patent_app_type] => utility [patent_app_number] => 18/236087 [patent_app_country] => US [patent_app_date] => 2023-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6883 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18236087 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/236087
ASYMMETRIC PASS THROUGH VOLTAGE FOR REDUCTION OF CELL-TO-CELL INTERFERENCE Aug 20, 2023 Pending
Array ( [id] => 19790279 [patent_doc_number] => 20250063958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => ULTRA-THIN PHASE-CHANGE MEMORY DEVICE WITH LATERAL ELECTRODE CONFIGURATION [patent_app_type] => utility [patent_app_number] => 18/449829 [patent_app_country] => US [patent_app_date] => 2023-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8606 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18449829 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/449829
Ultra-thin phase-change memory device with lateral electrode configuration Aug 14, 2023 Issued
Array ( [id] => 19773115 [patent_doc_number] => 20250054541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-13 [patent_title] => CROSSBAR CIRCUITS INCLUDING RRAM DEVICES WITH MINIMIZED WRITE DISTURBANCES [patent_app_type] => utility [patent_app_number] => 18/447949 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7553 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447949 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447949
CROSSBAR CIRCUITS INCLUDING RRAM DEVICES WITH MINIMIZED WRITE DISTURBANCES Aug 9, 2023 Pending
Array ( [id] => 18815114 [patent_doc_number] => 20230389452 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURE [patent_app_type] => utility [patent_app_number] => 18/447232 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8227 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447232 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447232
Semiconductor devices with a double sided word line structure Aug 8, 2023 Issued
Array ( [id] => 18821820 [patent_doc_number] => 20230396161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => CHARGE PUMP SYSTEM WITH LOW RIPPLE OUTPUT VOLTAGE [patent_app_type] => utility [patent_app_number] => 18/230450 [patent_app_country] => US [patent_app_date] => 2023-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5326 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18230450 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/230450
Charge pump system with low ripple output voltage Aug 3, 2023 Issued
Array ( [id] => 18848512 [patent_doc_number] => 20230410916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR MEMORY DEVICE WITH FIRST AND SECOND SENSE AMPLIFIERS [patent_app_type] => utility [patent_app_number] => 18/362289 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32462 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 325 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362289 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362289
Semiconductor memory device with first and second sense amplifiers Jul 30, 2023 Issued
Array ( [id] => 20760015 [patent_doc_number] => 12652806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-09 [patent_title] => Ferroelectric memory and storage device [patent_app_type] => utility [patent_app_number] => 18/359823 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 7591 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359823 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/359823
Ferroelectric memory and storage device Jul 25, 2023 Issued
Array ( [id] => 18774013 [patent_doc_number] => 20230368843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => THREE-DIMENSIONAL VERTICAL NOR FLASH THIN FILM TRANSISTOR STRINGS [patent_app_type] => utility [patent_app_number] => 18/225879 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16908 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -50 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18225879 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/225879
Three-dimensional vertical nor flash thin film transistor strings Jul 24, 2023 Issued
Array ( [id] => 20416664 [patent_doc_number] => 12499954 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Loop dependent bit line and read biases in a memory device [patent_app_type] => utility [patent_app_number] => 18/225735 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 27 [patent_no_of_words] => 11302 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18225735 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/225735
Loop dependent bit line and read biases in a memory device Jul 24, 2023 Issued
Array ( [id] => 19145991 [patent_doc_number] => 20240145006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => NON-VOLATILE MEMORY WITH DUMMY WORD LINE ASSISTED PRE-CHARGE [patent_app_type] => utility [patent_app_number] => 18/357467 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357467 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/357467
Non-volatile memory with dummy word line assisted pre-charge Jul 23, 2023 Issued
Array ( [id] => 19335344 [patent_doc_number] => 20240249774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/356051 [patent_app_country] => US [patent_app_date] => 2023-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17092 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18356051 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/356051
Memory device with soft programmed dummy cells and method of operating the same Jul 19, 2023 Issued
Array ( [id] => 18898345 [patent_doc_number] => 20240013830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => MEMRISTIVE STRUCTURE AND MEMRISTIVE DEVICE [patent_app_type] => utility [patent_app_number] => 18/348394 [patent_app_country] => US [patent_app_date] => 2023-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11364 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18348394 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/348394
Memristive structure and memristive device Jul 6, 2023 Issued
Array ( [id] => 20326546 [patent_doc_number] => 20250338634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => CUMULATIVE POLARIZATION COEXISTING WITH CONDUCTIVITY AT INTERFACIAL FERROELECTRICS [patent_app_type] => utility [patent_app_number] => 18/869977 [patent_app_country] => US [patent_app_date] => 2023-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6791 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18869977 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/869977
CUMULATIVE POLARIZATION COEXISTING WITH CONDUCTIVITY AT INTERFACIAL FERROELECTRICS Jun 20, 2023 Pending
Array ( [id] => 18729095 [patent_doc_number] => 20230343390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => STATIC RANDOM ACCESS MEMORY AND METHOD OF CONTROLLING THE SAME [patent_app_type] => utility [patent_app_number] => 18/333392 [patent_app_country] => US [patent_app_date] => 2023-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10839 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18333392 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/333392
Static random access memory with a supplementary driver circuit and method of controlling the same Jun 11, 2023 Issued
Array ( [id] => 18819446 [patent_doc_number] => 20230393786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => APPARATUSES AND METHODS FOR IN-MEMORY OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/331746 [patent_app_country] => US [patent_app_date] => 2023-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13462 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18331746 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/331746
Apparatuses and methods for in-memory operations Jun 7, 2023 Issued
Array ( [id] => 19285360 [patent_doc_number] => 20240221837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => MEMORY DEVICE AND OPERATION THEREOF [patent_app_type] => utility [patent_app_number] => 18/205835 [patent_app_country] => US [patent_app_date] => 2023-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13081 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18205835 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/205835
MEMORY DEVICE AND OPERATION THEREOF Jun 4, 2023 Pending
Array ( [id] => 18661032 [patent_doc_number] => 20230307045 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => METHOD OF RRAM WRITE RAMPING VOLTAGE IN INTERVALS [patent_app_type] => utility [patent_app_number] => 18/205417 [patent_app_country] => US [patent_app_date] => 2023-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5722 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18205417 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/205417
Method of RRAM write ramping voltage in intervals Jun 1, 2023 Issued
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