Search

Jerome Larry Leboeuf

Examiner (ID: 3880, Phone: (571)272-7612 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
617
Issued Applications
492
Pending Applications
62
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19175853 [patent_doc_number] => 20240161827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => MEMORY DEVICE AND OPERATION METHOD THEREOF, MEMORY SYSTEM, AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/092115 [patent_app_country] => US [patent_app_date] => 2022-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12739 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18092115 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/092115
Method for locating boundary page line in memory device, memory device, and memory system thereof Dec 29, 2022 Issued
Array ( [id] => 18848482 [patent_doc_number] => 20230410886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/081265 [patent_app_country] => US [patent_app_date] => 2022-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10816 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18081265 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/081265
Semiconductor storage device Dec 13, 2022 Issued
Array ( [id] => 18905763 [patent_doc_number] => 20240021248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/077572 [patent_app_country] => US [patent_app_date] => 2022-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9748 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -32 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18077572 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/077572
Semiconductor memory device with voltages applied to global drain select lines and method of operating the semiconductor memory device Dec 7, 2022 Issued
Array ( [id] => 18881042 [patent_doc_number] => 20240004411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => VOLTAGE SUPPLY CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/076060 [patent_app_country] => US [patent_app_date] => 2022-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9645 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18076060 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/076060
Voltage supply circuit with a voltage regulator Dec 5, 2022 Issued
Array ( [id] => 18833596 [patent_doc_number] => 20230402123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => MEMORY DEVICE AND TEST METHOD OF MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/059124 [patent_app_country] => US [patent_app_date] => 2022-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9293 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18059124 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/059124
Memory device and test method of memory device Nov 27, 2022 Issued
Array ( [id] => 19906330 [patent_doc_number] => 12283342 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Apparatuses and methods for input buffer data feedback equalization circuits [patent_app_type] => utility [patent_app_number] => 18/055588 [patent_app_country] => US [patent_app_date] => 2022-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7283 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18055588 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/055588
Apparatuses and methods for input buffer data feedback equalization circuits Nov 14, 2022 Issued
Array ( [id] => 20132070 [patent_doc_number] => 12374387 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Memory device and operating method of the memory device for controlling a channel voltage [patent_app_type] => utility [patent_app_number] => 17/986628 [patent_app_country] => US [patent_app_date] => 2022-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5337 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17986628 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/986628
Memory device and operating method of the memory device for controlling a channel voltage Nov 13, 2022 Issued
Array ( [id] => 18998914 [patent_doc_number] => 11915768 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Memory circuit, system and method for rapid retrieval of data sets [patent_app_type] => utility [patent_app_number] => 17/978144 [patent_app_country] => US [patent_app_date] => 2022-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 45 [patent_no_of_words] => 34383 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17978144 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/978144
Memory circuit, system and method for rapid retrieval of data sets Oct 30, 2022 Issued
Array ( [id] => 19539219 [patent_doc_number] => 12131774 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-29 [patent_title] => Vertical memory device with a double word line structure [patent_app_type] => utility [patent_app_number] => 17/968082 [patent_app_country] => US [patent_app_date] => 2022-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11749 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17968082 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/968082
Vertical memory device with a double word line structure Oct 17, 2022 Issued
Array ( [id] => 18335194 [patent_doc_number] => 20230127142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => SRAM WITH RECONFIGURABLE SETTING [patent_app_type] => utility [patent_app_number] => 18/045881 [patent_app_country] => US [patent_app_date] => 2022-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9526 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 368 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18045881 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/045881
SRAM with reconfigurable setting Oct 11, 2022 Issued
Array ( [id] => 19085929 [patent_doc_number] => 20240112730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => DEVICE, METHOD AND SYSTEM TO PROVIDE A RANDOM ACCESS MEMORY WITH A FERROELECTRIC RESISTIVE JUNCTION [patent_app_type] => utility [patent_app_number] => 17/957945 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17957945 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/957945
DEVICE, METHOD AND SYSTEM TO PROVIDE A RANDOM ACCESS MEMORY WITH A FERROELECTRIC RESISTIVE JUNCTION Sep 29, 2022 Pending
Array ( [id] => 18138752 [patent_doc_number] => 20230012586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => SIGNAL DETECTION SYSTEM AND MEMORY DETECTION METHOD [patent_app_type] => utility [patent_app_number] => 17/955670 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19822 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955670 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955670
Signal detection system for duty cycle testing and memory detection method Sep 28, 2022 Issued
Array ( [id] => 19687715 [patent_doc_number] => 20250006260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/704854 [patent_app_country] => US [patent_app_date] => 2022-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14076 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18704854 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/704854
Semiconductor storage device for comparing reference voltages Sep 26, 2022 Issued
Array ( [id] => 18631516 [patent_doc_number] => 20230290418 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2023-09-14 [patent_title] => MEMORY CIRCUIT, SYSTEM AND METHOD FOR RAPID RETRIEVAL OF DATA SETS [patent_app_type] => utility [patent_app_number] => 17/934965 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 34385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17934965 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/934965
Memory circuit, system and method for rapid retrieval of data sets Sep 22, 2022 Issued
Array ( [id] => 18631516 [patent_doc_number] => 20230290418 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2023-09-14 [patent_title] => MEMORY CIRCUIT, SYSTEM AND METHOD FOR RAPID RETRIEVAL OF DATA SETS [patent_app_type] => utility [patent_app_number] => 17/934965 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 34385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17934965 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/934965
Memory circuit, system and method for rapid retrieval of data sets Sep 22, 2022 Issued
Array ( [id] => 20760167 [patent_doc_number] => 12652962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-09 [patent_title] => Semiconductor device, storage device, and electronic device with first and second metal oxide channel transistors [patent_app_type] => utility [patent_app_number] => 18/691163 [patent_app_country] => US [patent_app_date] => 2022-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 59 [patent_no_of_words] => 38599 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18691163 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/691163
Semiconductor device, storage device, and electronic device with first and second metal oxide channel transistors Sep 7, 2022 Issued
Array ( [id] => 20667380 [patent_doc_number] => 12609160 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-21 [patent_title] => Resistance compensation device and method for storage chip, and storage chip [patent_app_type] => utility [patent_app_number] => 18/575264 [patent_app_country] => US [patent_app_date] => 2022-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18575264 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/575264
Resistance compensation device and method for storage chip, and storage chip Sep 1, 2022 Issued
Array ( [id] => 19733561 [patent_doc_number] => 12211561 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Semiconductor storage device acquiring voltage from dummy pillars [patent_app_type] => utility [patent_app_number] => 17/899951 [patent_app_country] => US [patent_app_date] => 2022-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13833 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899951 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/899951
Semiconductor storage device acquiring voltage from dummy pillars Aug 30, 2022 Issued
Array ( [id] => 18311876 [patent_doc_number] => 20230115776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND TEST METHOD FOR THE SAME [patent_app_type] => utility [patent_app_number] => 17/900228 [patent_app_country] => US [patent_app_date] => 2022-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16422 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 398 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17900228 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/900228
Semiconductor memory device and test method for the same Aug 30, 2022 Issued
Array ( [id] => 18617719 [patent_doc_number] => 20230284460 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => VARIABLE RESISTANCE NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 17/899898 [patent_app_country] => US [patent_app_date] => 2022-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14686 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899898 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/899898
Variable resistance non-volatile memory with a gate insulator film at a same height as a voltage application electrode Aug 30, 2022 Issued
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