| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2857779
[patent_doc_number] => 05107461
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-04-21
[patent_title] => 'EEPROM memory cell with improved protection against errors due to cell breakdown'
[patent_app_type] => 1
[patent_app_number] => 7/549763
[patent_app_country] => US
[patent_app_date] => 1990-07-09
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Array
(
[id] => 2847361
[patent_doc_number] => 05121353
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-09
[patent_title] => 'Ferroelectric capacitor memory circuit MOS setting and transmission transistor'
[patent_app_type] => 1
[patent_app_number] => 7/548823
[patent_app_country] => US
[patent_app_date] => 1990-07-06
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[firstpage_image] =>[orig_patent_app_number] => 548823
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/548823 | Ferroelectric capacitor memory circuit MOS setting and transmission transistor | Jul 5, 1990 | Issued |
Array
(
[id] => 2703267
[patent_doc_number] => 05020029
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-28
[patent_title] => 'Static semiconductor memory device with predetermined threshold voltages'
[patent_app_type] => 1
[patent_app_number] => 7/547263
[patent_app_country] => US
[patent_app_date] => 1990-07-03
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[firstpage_image] =>[orig_patent_app_number] => 547263
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/547263 | Static semiconductor memory device with predetermined threshold voltages | Jul 2, 1990 | Issued |
| 07/545781 | SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREFOR | Jun 28, 1990 | Abandoned |
| 07/544283 | METHOD AND APPARATUS FOR TESTING MEMORIES | Jun 24, 1990 | Abandoned |
Array
(
[id] => 2927830
[patent_doc_number] => 05179687
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-01-12
[patent_title] => 'Semiconductor memory device containing a cache and an operation method thereof'
[patent_app_type] => 1
[patent_app_number] => 7/542682
[patent_app_country] => US
[patent_app_date] => 1990-06-25
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[firstpage_image] =>[orig_patent_app_number] => 542682
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Array
(
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[patent_kind] => NA
[patent_issue_date] => 1993-09-21
[patent_title] => 'Microprocessor having cache bypass signal terminal'
[patent_app_type] => 1
[patent_app_number] => 7/540617
[patent_app_country] => US
[patent_app_date] => 1990-06-20
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[firstpage_image] =>[orig_patent_app_number] => 540617
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/540617 | Microprocessor having cache bypass signal terminal | Jun 19, 1990 | Issued |
Array
(
[id] => 2794514
[patent_doc_number] => 05093805
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[patent_kind] => NA
[patent_issue_date] => 1992-03-03
[patent_title] => 'Non-binary memory array'
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[firstpage_image] =>[orig_patent_app_number] => 541122
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/541122 | Non-binary memory array | Jun 19, 1990 | Issued |
Array
(
[id] => 2766708
[patent_doc_number] => 05043943
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-08-27
[patent_title] => 'Cache memory with a parity write control circuit'
[patent_app_type] => 1
[patent_app_number] => 7/539651
[patent_app_country] => US
[patent_app_date] => 1990-06-18
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[pdf_file] => patents/05/043/05043943.pdf
[firstpage_image] =>[orig_patent_app_number] => 539651
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/539651 | Cache memory with a parity write control circuit | Jun 17, 1990 | Issued |
Array
(
[id] => 2857918
[patent_doc_number] => 05111386
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-05
[patent_title] => 'Cache contained type semiconductor memory device and operating method therefor'
[patent_app_type] => 1
[patent_app_number] => 7/538605
[patent_app_country] => US
[patent_app_date] => 1990-06-14
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[pdf_file] => patents/05/111/05111386.pdf
[firstpage_image] =>[orig_patent_app_number] => 538605
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/538605 | Cache contained type semiconductor memory device and operating method therefor | Jun 13, 1990 | Issued |
| 07/536217 | METHOD AND APPARATUS FOR A LOAD AND FLAG INSTRUCTION | Jun 10, 1990 | Abandoned |
Array
(
[id] => 2796929
[patent_doc_number] => 05155701
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-13
[patent_title] => 'Semiconductor integrated circuit device and method of testing the same'
[patent_app_type] => 1
[patent_app_number] => 7/535298
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[pdf_file] => patents/05/155/05155701.pdf
[firstpage_image] =>[orig_patent_app_number] => 535298
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/535298 | Semiconductor integrated circuit device and method of testing the same | Jun 7, 1990 | Issued |
Array
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[id] => 2813940
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-19
[patent_title] => 'Dual port memory system'
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[patent_app_number] => 7/534081
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[firstpage_image] =>[orig_patent_app_number] => 534081
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/534081 | Dual port memory system | Jun 5, 1990 | Issued |
Array
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[patent_doc_number] => 05261068
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[patent_kind] => NA
[patent_issue_date] => 1993-11-09
[patent_title] => 'Dual path memory retrieval system for an interleaved dynamic RAM memory unit'
[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/530137 | Dual path memory retrieval system for an interleaved dynamic RAM memory unit | May 24, 1990 | Issued |
Array
(
[id] => 2800939
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[patent_kind] => NA
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/523663 | Dynamic type random-access memory having improved timing characteristics | May 14, 1990 | Issued |
Array
(
[id] => 2679917
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[firstpage_image] =>[orig_patent_app_number] => 520943
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/520943 | Internal synchronous static RAM | May 8, 1990 | Issued |
Array
(
[id] => 2655585
[patent_doc_number] => 04980860
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[patent_kind] => NA
[patent_issue_date] => 1990-12-25
[patent_title] => 'Cross-coupled complementary bit lines for a semiconductor memory with pull-up circuitry'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/521000 | Cross-coupled complementary bit lines for a semiconductor memory with pull-up circuitry | May 7, 1990 | Issued |
| 07/515341 | SEMICONDUCTOR MEMORY | Apr 29, 1990 | Abandoned |
Array
(
[id] => 2877870
[patent_doc_number] => 05097450
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/515336 | Semiconductor memory device having a plurality of memory blocks | Apr 29, 1990 | Issued |