
Jesse Y. Miyoshi
Examiner (ID: 18920)
| Most Active Art Unit | 2896 |
| Art Unit(s) | 2898, 2811, 2896, 2822 |
| Total Applications | 673 |
| Issued Applications | 318 |
| Pending Applications | 96 |
| Abandoned Applications | 282 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19590126
[patent_doc_number] => 20240387683
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-21
[patent_title] => SEMICONDUCTOR DEVICES WITH IMPROVED CAPACITORS
[patent_app_type] => utility
[patent_app_number] => 18/785381
[patent_app_country] => US
[patent_app_date] => 2024-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9300
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18785381
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/785381 | SEMICONDUCTOR DEVICES WITH IMPROVED CAPACITORS | Jul 25, 2024 | Pending |
Array
(
[id] => 19561845
[patent_doc_number] => 20240373637
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-07
[patent_title] => Memory Circuitry Comprising a Vertical String of Memory Cells and a Conductive Via and Method Used in Forming a Vertical String of Memory Cells and a Conductive Via
[patent_app_type] => utility
[patent_app_number] => 18/771964
[patent_app_country] => US
[patent_app_date] => 2024-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6711
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18771964
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/771964 | Memory Circuitry Comprising a Vertical String of Memory Cells and a Conductive Via and Method Used in Forming a Vertical String of Memory Cells and a Conductive Via | Jul 11, 2024 | Pending |
Array
(
[id] => 19531912
[patent_doc_number] => 20240355814
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-24
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/760507
[patent_app_country] => US
[patent_app_date] => 2024-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14964
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 463
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18760507
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/760507 | SEMICONDUCTOR DEVICE | Jun 30, 2024 | Pending |
Array
(
[id] => 19517831
[patent_doc_number] => 20240349517
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-17
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/756056
[patent_app_country] => US
[patent_app_date] => 2024-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9384
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18756056
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/756056 | SEMICONDUCTOR DEVICE | Jun 26, 2024 | Pending |
Array
(
[id] => 19452746
[patent_doc_number] => 20240312876
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-19
[patent_title] => Air Gap Seal for Interconnect Air Gap and Method of Fabricating Thereof
[patent_app_type] => utility
[patent_app_number] => 18/671580
[patent_app_country] => US
[patent_app_date] => 2024-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14433
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18671580
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/671580 | Air Gap Seal for Interconnect Air Gap and Method of Fabricating Thereof | May 21, 2024 | Pending |
Array
(
[id] => 19436179
[patent_doc_number] => 20240304677
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-12
[patent_title] => SEMICONDUCTOR DEVICE INCLUDING AN IGBT WITH REDUCED VARIATION IN THRESHOLD VOLTAGE
[patent_app_type] => utility
[patent_app_number] => 18/665569
[patent_app_country] => US
[patent_app_date] => 2024-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19201
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -29
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18665569
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/665569 | SEMICONDUCTOR DEVICE INCLUDING AN IGBT WITH REDUCED VARIATION IN THRESHOLD VOLTAGE | May 15, 2024 | Pending |
Array
(
[id] => 19407271
[patent_doc_number] => 20240290782
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-29
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/659125
[patent_app_country] => US
[patent_app_date] => 2024-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16873
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18659125
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/659125 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | May 8, 2024 | Pending |
Array
(
[id] => 19698519
[patent_doc_number] => 20250017064
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-09
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/627935
[patent_app_country] => US
[patent_app_date] => 2024-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12358
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18627935
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/627935 | DISPLAY DEVICE | Apr 4, 2024 | Pending |
Array
(
[id] => 19790245
[patent_doc_number] => 20250063924
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-20
[patent_title] => DISPLAY APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/440974
[patent_app_country] => US
[patent_app_date] => 2024-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13311
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18440974
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/440974 | DISPLAY APPARATUS | Feb 13, 2024 | Pending |
Array
(
[id] => 19237338
[patent_doc_number] => 20240194533
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => INTEGRATED CIRCUIT DEVICE STRUCTURES AND DOUBLE-SIDED ELECTRICAL TESTING
[patent_app_type] => utility
[patent_app_number] => 18/389625
[patent_app_country] => US
[patent_app_date] => 2023-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 65228
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18389625
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/389625 | INTEGRATED CIRCUIT DEVICE STRUCTURES AND DOUBLE-SIDED ELECTRICAL TESTING | Dec 18, 2023 | Pending |
Array
(
[id] => 20065839
[patent_doc_number] => 20250204061
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-19
[patent_title] => COMPLEMENTARY METAL OXIDE SEMICONDUCTOR IMAGE SENSOR WITH REDUCED P-TYPE REGION WIDTH
[patent_app_type] => utility
[patent_app_number] => 18/542318
[patent_app_country] => US
[patent_app_date] => 2023-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18542318
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/542318 | COMPLEMENTARY METAL OXIDE SEMICONDUCTOR IMAGE SENSOR WITH REDUCED P-TYPE REGION WIDTH | Dec 14, 2023 | Pending |
Array
(
[id] => 19086422
[patent_doc_number] => 20240113223
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-04
[patent_title] => SEMICONDUCTOR DEVICES COMPRISING TRANSISTORS HAVING INCREASED THRESHOLD VOLTAGE AND RELATED METHODS AND SYSTEMS
[patent_app_type] => utility
[patent_app_number] => 18/530113
[patent_app_country] => US
[patent_app_date] => 2023-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7354
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18530113
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/530113 | SEMICONDUCTOR DEVICES COMPRISING TRANSISTORS HAVING INCREASED THRESHOLD VOLTAGE AND RELATED METHODS AND SYSTEMS | Dec 4, 2023 | Pending |
Array
(
[id] => 19054936
[patent_doc_number] => 20240096905
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-21
[patent_title] => DISPLAY PANEL AND TILED DISPLAY SCREEN
[patent_app_type] => utility
[patent_app_number] => 18/519101
[patent_app_country] => US
[patent_app_date] => 2023-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8761
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18519101
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/519101 | DISPLAY PANEL AND TILED DISPLAY SCREEN | Nov 26, 2023 | Pending |
Array
(
[id] => 19206108
[patent_doc_number] => 20240178007
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-30
[patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/516745
[patent_app_country] => US
[patent_app_date] => 2023-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4323
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18516745
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/516745 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE | Nov 20, 2023 | Pending |
Array
(
[id] => 19191485
[patent_doc_number] => 20240170398
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-23
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/511535
[patent_app_country] => US
[patent_app_date] => 2023-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5684
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18511535
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/511535 | SEMICONDUCTOR DEVICE | Nov 15, 2023 | Pending |
Array
(
[id] => 19038489
[patent_doc_number] => 20240088304
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-14
[patent_title] => DIODE INCLUDING A TRENCH ELECTRODE SUBDIVIDED INTO AT LEAST FIRST AND SECOND PARTS
[patent_app_type] => utility
[patent_app_number] => 18/510906
[patent_app_country] => US
[patent_app_date] => 2023-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7799
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18510906
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/510906 | Diode including a trench electrode subdivided into at least first and second parts | Nov 15, 2023 | Issued |
Array
(
[id] => 19486744
[patent_doc_number] => 20240334786
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-03
[patent_title] => WINDOW MEMBER, DISPLAY DEVICE INCLUDING THE SAME, AND METHOD FOR MANUFACTURING DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/507729
[patent_app_country] => US
[patent_app_date] => 2023-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8752
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18507729
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/507729 | WINDOW MEMBER, DISPLAY DEVICE INCLUDING THE SAME, AND METHOD FOR MANUFACTURING DISPLAY DEVICE | Nov 12, 2023 | Pending |
Array
(
[id] => 18991060
[patent_doc_number] => 20240063029
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-22
[patent_title] => PACKAGING STRUCTURE HAVING ORGANIC INTERPOSER LAYER AND METHOD FOR MANUFACTURING SAME
[patent_app_type] => utility
[patent_app_number] => 18/235894
[patent_app_country] => US
[patent_app_date] => 2023-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4125
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18235894
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/235894 | PACKAGING STRUCTURE HAVING ORGANIC INTERPOSER LAYER AND METHOD FOR MANUFACTURING SAME | Aug 20, 2023 | Pending |
Array
(
[id] => 18975463
[patent_doc_number] => 20240055555
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-15
[patent_title] => COMPOSITE SUBSTRATES AND SEMICONDUCTOR DEVICE STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 18/448193
[patent_app_country] => US
[patent_app_date] => 2023-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5025
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 33
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448193
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/448193 | COMPOSITE SUBSTRATES AND SEMICONDUCTOR DEVICE STRUCTURES | Aug 10, 2023 | Pending |
Array
(
[id] => 18812859
[patent_doc_number] => 20230387196
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-30
[patent_title] => SUPER JUNCTION STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/448013
[patent_app_country] => US
[patent_app_date] => 2023-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10998
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448013
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/448013 | SUPER JUNCTION STRUCTURE | Aug 9, 2023 | Pending |