Search

Jesse Y. Miyoshi

Examiner (ID: 9461, Phone: (571)270-1629 , Office: P/2896 )

Most Active Art Unit
2896
Art Unit(s)
2896, 2898, 2811, 2822
Total Applications
677
Issued Applications
323
Pending Applications
94
Abandoned Applications
282

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13610605 [patent_doc_number] => 20180356852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => TWO-TRANSISTOR BANDGAP REFERENCE CIRCUIT AND FINFET DEVICE SUITED FOR SAME [patent_app_type] => utility [patent_app_number] => 16/106476 [patent_app_country] => US [patent_app_date] => 2018-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6098 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16106476 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/106476
Two-transistor bandgap reference circuit and FinFET device suited for same Aug 20, 2018 Issued
Array ( [id] => 14024701 [patent_doc_number] => 20190074344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => ORGANIC LIGHT-EMITTING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/103854 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7770 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103854 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/103854
Organic light-emitting display device including a compensation line and a bridge pattern Aug 13, 2018 Issued
Array ( [id] => 16645558 [patent_doc_number] => 10923426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Standard-cell layout structure with horn power and smart metal cut [patent_app_type] => utility [patent_app_number] => 16/057875 [patent_app_country] => US [patent_app_date] => 2018-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 7239 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16057875 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/057875
Standard-cell layout structure with horn power and smart metal cut Aug 7, 2018 Issued
Array ( [id] => 17224937 [patent_doc_number] => 11177447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-16 [patent_title] => Flexible display and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/053933 [patent_app_country] => US [patent_app_date] => 2018-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2897 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16053933 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/053933
Flexible display and manufacturing method thereof Aug 2, 2018 Issued
Array ( [id] => 15807837 [patent_doc_number] => 20200127061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 16/317827 [patent_app_country] => US [patent_app_date] => 2018-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3895 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16317827 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/317827
DISPLAY PANEL Aug 1, 2018 Abandoned
Array ( [id] => 16187174 [patent_doc_number] => 10720516 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-21 [patent_title] => Gate stack structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 15/991761 [patent_app_country] => US [patent_app_date] => 2018-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 8685 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15991761 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/991761
Gate stack structure and method for forming the same May 28, 2018 Issued
Array ( [id] => 15000053 [patent_doc_number] => 20190318984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-17 [patent_title] => Semiconductor Device and Method of Forming Conductive Vias to Have Enhanced Contact to Shielding Layer [patent_app_type] => utility [patent_app_number] => 15/955014 [patent_app_country] => US [patent_app_date] => 2018-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5542 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15955014 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/955014
Semiconductor Device and Method of Forming Conductive Vias to Have Enhanced Contact to Shielding Layer Apr 16, 2018 Abandoned
Array ( [id] => 19612126 [patent_doc_number] => 12161021 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Display device, mask, and method for manufacturing display device [patent_app_type] => utility [patent_app_number] => 17/042835 [patent_app_country] => US [patent_app_date] => 2018-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7125 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17042835 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/042835
Display device, mask, and method for manufacturing display device Mar 29, 2018 Issued
Array ( [id] => 16782081 [patent_doc_number] => 20210119160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => LIGHT-EMITTING ELEMENT AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/041134 [patent_app_country] => US [patent_app_date] => 2018-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5122 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17041134 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/041134
LIGHT-EMITTING ELEMENT AND DISPLAY DEVICE Mar 27, 2018 Abandoned
Array ( [id] => 14049743 [patent_doc_number] => 20190080979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/910429 [patent_app_country] => US [patent_app_date] => 2018-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15910429 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/910429
SEMICONDUCTOR DEVICE Mar 1, 2018 Abandoned
Array ( [id] => 14381955 [patent_doc_number] => 20190164890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => PITCH-DIVIDED INTERCONNECTS FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION [patent_app_type] => utility [patent_app_number] => 15/859415 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 73595 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859415 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859415
PITCH-DIVIDED INTERCONNECTS FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION Dec 29, 2017 Pending
Array ( [id] => 13799789 [patent_doc_number] => 20190013433 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => Light Emitting Transistor and Method for Manufacturing the Same [patent_app_type] => utility [patent_app_number] => 15/835379 [patent_app_country] => US [patent_app_date] => 2017-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15652 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15835379 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/835379
Light Emitting Transistor and Method for Manufacturing the Same Dec 6, 2017 Abandoned
Array ( [id] => 14350581 [patent_doc_number] => 20190157263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => ASYMMETRIC TRANSIENT VOLTAGE SUPPRESSOR DEVICE AND METHODS FOR FORMATION [patent_app_type] => utility [patent_app_number] => 15/817523 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2932 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15817523 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/817523
ASYMMETRIC TRANSIENT VOLTAGE SUPPRESSOR DEVICE AND METHODS FOR FORMATION Nov 19, 2017 Abandoned
Array ( [id] => 13902223 [patent_doc_number] => 20190040316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => ETCHING SOLUTION OF IGZO FILM LAYER AND ETCHING METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 15/579936 [patent_app_country] => US [patent_app_date] => 2017-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2010 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15579936 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/579936
ETCHING SOLUTION OF IGZO FILM LAYER AND ETCHING METHOD OF THE SAME Nov 15, 2017 Abandoned
Array ( [id] => 16500764 [patent_doc_number] => 10866145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Thermal sensor including pulse-width modulation output [patent_app_type] => utility [patent_app_number] => 15/811181 [patent_app_country] => US [patent_app_date] => 2017-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8692 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15811181 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/811181
Thermal sensor including pulse-width modulation output Nov 12, 2017 Issued
Array ( [id] => 15218605 [patent_doc_number] => 20190371989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => METHOD OF MANUFACTURING A LEAD FRAME [patent_app_type] => utility [patent_app_number] => 16/348146 [patent_app_country] => US [patent_app_date] => 2017-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4688 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16348146 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/348146
METHOD OF MANUFACTURING A LEAD FRAME Nov 5, 2017 Abandoned
Array ( [id] => 12241409 [patent_doc_number] => 20180074272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-15 [patent_title] => 'DEVICE PACKAGE AND METHODS FOR THE FABRICATION AND TESTING THEREOF' [patent_app_type] => utility [patent_app_number] => 15/802046 [patent_app_country] => US [patent_app_date] => 2017-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 23152 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15802046 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/802046
DEVICE PACKAGE AND METHODS FOR THE FABRICATION AND TESTING THEREOF Nov 1, 2017 Abandoned
Array ( [id] => 17396066 [patent_doc_number] => 11245091 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-08 [patent_title] => OLED panel having OLED element sealed therein, OLED packaging method for sealing OLED element, and display panel [patent_app_type] => utility [patent_app_number] => 16/089804 [patent_app_country] => US [patent_app_date] => 2017-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4566 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16089804 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/089804
OLED panel having OLED element sealed therein, OLED packaging method for sealing OLED element, and display panel Sep 21, 2017 Issued
Array ( [id] => 15955341 [patent_doc_number] => 10665586 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-26 [patent_title] => Method of concurrently forming source/drain and gate contacts and related device [patent_app_type] => utility [patent_app_number] => 15/708911 [patent_app_country] => US [patent_app_date] => 2017-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2458 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15708911 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/708911
Method of concurrently forming source/drain and gate contacts and related device Sep 18, 2017 Issued
Array ( [id] => 12122501 [patent_doc_number] => 20180006087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'METHOD FOR BASE CONTACT LAYOUT, SUCH AS FOR MEMORY' [patent_app_type] => utility [patent_app_number] => 15/691576 [patent_app_country] => US [patent_app_date] => 2017-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4020 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15691576 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/691576
METHOD FOR BASE CONTACT LAYOUT, SUCH AS FOR MEMORY Aug 29, 2017 Abandoned
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