Search

Jesse Y. Miyoshi

Examiner (ID: 9461, Phone: (571)270-1629 , Office: P/2896 )

Most Active Art Unit
2896
Art Unit(s)
2896, 2898, 2811, 2822
Total Applications
677
Issued Applications
323
Pending Applications
94
Abandoned Applications
282

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17373891 [patent_doc_number] => 20220028943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => DISPLAY SCREENS AND ELECTRONIC DEVICES [patent_app_type] => utility [patent_app_number] => 17/497897 [patent_app_country] => US [patent_app_date] => 2021-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4926 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17497897 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/497897
Display screen and electronic device for improving the imaging effect Oct 8, 2021 Issued
Array ( [id] => 17339640 [patent_doc_number] => 20220005971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-06 [patent_title] => PASSIVATION COVERED LIGHT EMITTING UNIT STACK [patent_app_type] => utility [patent_app_number] => 17/475273 [patent_app_country] => US [patent_app_date] => 2021-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 43132 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17475273 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/475273
PASSIVATION COVERED LIGHT EMITTING UNIT STACK Sep 13, 2021 Pending
Array ( [id] => 17486026 [patent_doc_number] => 20220093530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => SELF-ERASABLE AND REWRITABLE OPTOEXCITONIC PLATFORM FOR ANTI-TAMPER HARDWARE [patent_app_type] => utility [patent_app_number] => 17/471799 [patent_app_country] => US [patent_app_date] => 2021-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6452 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17471799 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/471799
SELF-ERASABLE AND REWRITABLE OPTOEXCITONIC PLATFORM FOR ANTI-TAMPER HARDWARE Sep 9, 2021 Abandoned
Array ( [id] => 20807542 [patent_doc_number] => 12672464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-30 [patent_title] => Display panel and display device [patent_app_type] => utility [patent_app_number] => 17/600387 [patent_app_country] => US [patent_app_date] => 2021-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 3315 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17600387 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/600387
Display panel and display device Sep 7, 2021 Issued
Array ( [id] => 18804296 [patent_doc_number] => 11837459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Method and structure for diodes with backside contacts [patent_app_type] => utility [patent_app_number] => 17/462799 [patent_app_country] => US [patent_app_date] => 2021-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 85 [patent_no_of_words] => 13373 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17462799 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/462799
Method and structure for diodes with backside contacts Aug 30, 2021 Issued
Array ( [id] => 20307094 [patent_doc_number] => 12453105 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Memory chiplet having multiple arrays of memory devices and methods of forming the same [patent_app_type] => utility [patent_app_number] => 17/412365 [patent_app_country] => US [patent_app_date] => 2021-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3309 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17412365 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/412365
Memory chiplet having multiple arrays of memory devices and methods of forming the same Aug 25, 2021 Issued
Array ( [id] => 20748218 [patent_doc_number] => 12648157 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-02 [patent_title] => Hybrid high bandwidth memories [patent_app_type] => utility [patent_app_number] => 17/410499 [patent_app_country] => US [patent_app_date] => 2021-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 3449 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17410499 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/410499
Hybrid high bandwidth memories Aug 23, 2021 Issued
Array ( [id] => 19370560 [patent_doc_number] => 12062654 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Semiconductor device and method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 17/409053 [patent_app_country] => US [patent_app_date] => 2021-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 16828 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17409053 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/409053
Semiconductor device and method of manufacturing semiconductor device Aug 22, 2021 Issued
Array ( [id] => 17403130 [patent_doc_number] => 20220045221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => Diode Including a Plurality of Trenches [patent_app_type] => utility [patent_app_number] => 17/389479 [patent_app_country] => US [patent_app_date] => 2021-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7800 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389479 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/389479
Diode including a plurality of trenches Jul 29, 2021 Issued
Array ( [id] => 17189176 [patent_doc_number] => 20210336061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/370590 [patent_app_country] => US [patent_app_date] => 2021-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13565 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17370590 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/370590
DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME Jul 7, 2021 Pending
Array ( [id] => 17347294 [patent_doc_number] => 20220013625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => VERTICAL POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 17/370179 [patent_app_country] => US [patent_app_date] => 2021-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17370179 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/370179
VERTICAL POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD Jul 7, 2021 Abandoned
Array ( [id] => 18092919 [patent_doc_number] => 20220411260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 17/356437 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5394 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17356437 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/356437
Semiconductor structure and method for manufacturing thereof Jun 22, 2021 Issued
Array ( [id] => 19812456 [patent_doc_number] => 12243869 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Semiconductor device and semiconductor storage device [patent_app_type] => utility [patent_app_number] => 17/350852 [patent_app_country] => US [patent_app_date] => 2021-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6396 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 398 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17350852 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/350852
Semiconductor device and semiconductor storage device Jun 16, 2021 Issued
Array ( [id] => 18061822 [patent_doc_number] => 20220392909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => MEMORY DEVICE WITH STAGGERED ISOLATION REGIONS [patent_app_type] => utility [patent_app_number] => 17/339071 [patent_app_country] => US [patent_app_date] => 2021-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3236 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17339071 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/339071
MEMORY DEVICE WITH STAGGERED ISOLATION REGIONS Jun 3, 2021 Pending
Array ( [id] => 18426111 [patent_doc_number] => 20230180576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => PHOTOELECTRIC SENSOR, METHOD OF MANUFACTURING THE SAME, AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 17/425718 [patent_app_country] => US [patent_app_date] => 2021-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17425718 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/425718
PHOTOELECTRIC SENSOR, METHOD OF MANUFACTURING THE SAME, AND DISPLAY PANEL May 27, 2021 Abandoned
Array ( [id] => 18040089 [patent_doc_number] => 20220384306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => THERMAL INTERFACE STRUCTURE FOR INTEGRATED CIRCUIT DEVICE ASSEMBLIES [patent_app_type] => utility [patent_app_number] => 17/330870 [patent_app_country] => US [patent_app_date] => 2021-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6869 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17330870 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/330870
THERMAL INTERFACE STRUCTURE FOR INTEGRATED CIRCUIT DEVICE ASSEMBLIES May 25, 2021 Abandoned
Array ( [id] => 18024417 [patent_doc_number] => 20220375916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => THREE-DIMENSIONAL MONOLITHICALLY INTEGRATED NANORIBBON-BASED MEMORY AND COMPUTE [patent_app_type] => utility [patent_app_number] => 17/323425 [patent_app_country] => US [patent_app_date] => 2021-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17323425 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/323425
THREE-DIMENSIONAL MONOLITHICALLY INTEGRATED NANORIBBON-BASED MEMORY AND COMPUTE May 17, 2021 Abandoned
Array ( [id] => 17795608 [patent_doc_number] => 20220254700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => PACKAGED POWER SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/320363 [patent_app_country] => US [patent_app_date] => 2021-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17320363 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/320363
PACKAGED POWER SEMICONDUCTOR DEVICE May 13, 2021 Abandoned
Array ( [id] => 17985871 [patent_doc_number] => 20220351908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => METHOD OF MANUFACTURING CAPACITOR STRUCTURE AND CAPACITOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/242327 [patent_app_country] => US [patent_app_date] => 2021-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4566 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17242327 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/242327
Method of manufacturing capacitor structure and capacitor structure Apr 27, 2021 Issued
Array ( [id] => 17347303 [patent_doc_number] => 20220013634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/240371 [patent_app_country] => US [patent_app_date] => 2021-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14763 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 361 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17240371 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/240371
Semiconductor device including IGBT, boundary, and diode regions Apr 25, 2021 Issued
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