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Jessica L. Rossi

Supervisory Patent Examiner (ID: 6887, Phone: (571)272-1223 , Office: P/4100 )

Most Active Art Unit
1733
Art Unit(s)
1791, 4132, 1733, OPT
Total Applications
436
Issued Applications
256
Pending Applications
32
Abandoned Applications
148
Applications
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Applications

Application numberTitle of the applicationFiling DateStatus
07/558994 VIRTUAL MULTI-PORT RAM Jul 26, 1990 Abandoned
Array ( [id] => 3667865 [patent_doc_number] => 05627778 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-06 [patent_title] => 'Dram sensing scheme' [patent_app_type] => 1 [patent_app_number] => 7/557249 [patent_app_country] => US [patent_app_date] => 1990-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2978 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/627/05627778.pdf [firstpage_image] =>[orig_patent_app_number] => 557249 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/557249 		Dram sensing scheme Jul 23, 1990 Issued
07/553556 ELASTIC STORE MEMORY CIRCUIT Jul 17, 1990 Abandoned
Array ( [id] => 2703982 [patent_doc_number] => 05065366 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-12 [patent_title] => 'Non-volatile RAM bit cell' [patent_app_type] => 1 [patent_app_number] => 7/554046 [patent_app_country] => US [patent_app_date] => 1990-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2028 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/065/05065366.pdf [firstpage_image] =>[orig_patent_app_number] => 554046 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/554046 		Non-volatile RAM bit cell Jul 16, 1990 Issued
07/551946 MOS INTEGRATED CIRCUIT WITH ADJUSTABLE THRESHOLD VOLTAGE Jul 10, 1990 Abandoned
Array ( [id] => 2742244 [patent_doc_number] => 04998223 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-05 [patent_title] => 'Programmable semiconductor memory apparatus' [patent_app_type] => 1 [patent_app_number] => 7/550786 [patent_app_country] => US [patent_app_date] => 1990-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3930 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/998/04998223.pdf [firstpage_image] =>[orig_patent_app_number] => 550786 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/550786 		Programmable semiconductor memory apparatus Jul 9, 1990 Issued
Array ( [id] => 2776332 [patent_doc_number] => 05036486 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-30 [patent_title] => 'Associative memory device' [patent_app_type] => 1 [patent_app_number] => 7/550156 [patent_app_country] => US [patent_app_date] => 1990-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 5837 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/036/05036486.pdf [firstpage_image] =>[orig_patent_app_number] => 550156 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/550156 		Associative memory device Jul 8, 1990 Issued
Array ( [id] => 2715856 [patent_doc_number] => 05068831 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-26 [patent_title] => 'Data read circuit for semiconductor storage device' [patent_app_type] => 1 [patent_app_number] => 7/550025 [patent_app_country] => US [patent_app_date] => 1990-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3556 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 372 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/068/05068831.pdf [firstpage_image] =>[orig_patent_app_number] => 550025 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/550025 		Data read circuit for semiconductor storage device Jul 8, 1990 Issued
07/546854 SEMICONDUCTOR IC DEVICE USING FERROELECTRIC MATERIAL IN DATA STORAGE CELLS Jul 1, 1990 Abandoned
07/545796 SEMICONDUCTOR MEMORY DEVICE PERFORMING LAST IN - FIRST OUT OPERATION AND THE METHOD FOR CONTROLLING THE SAME Jun 28, 1990 Abandoned
07/546066 ELECTRICALLY-ERASABLE, ELECTRICALLY-PROGRAMMALBE READ-ONLY MEMORY CELL WITH A SELECTABLE THRESHOLD VOLTAGE AND METHODS FOR ITS USE Jun 28, 1990 Abandoned
Array ( [id] => 2743911 [patent_doc_number] => 05051955 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-24 [patent_title] => 'Semiconductor memory having improved data readout scheme' [patent_app_type] => 1 [patent_app_number] => 7/543526 [patent_app_country] => US [patent_app_date] => 1990-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 4414 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 370 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/051/05051955.pdf [firstpage_image] =>[orig_patent_app_number] => 543526 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/543526 		Semiconductor memory having improved data readout scheme Jun 25, 1990 Issued
Array ( [id] => 2858682 [patent_doc_number] => 05111430 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-05 [patent_title] => 'Non-volatile memory with hot carriers transmitted to floating gate through control gate' [patent_app_type] => 1 [patent_app_number] => 7/541911 [patent_app_country] => US [patent_app_date] => 1990-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 28 [patent_no_of_words] => 5646 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/111/05111430.pdf [firstpage_image] =>[orig_patent_app_number] => 541911 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/541911 		Non-volatile memory with hot carriers transmitted to floating gate through control gate Jun 20, 1990 Issued
Array ( [id] => 2715981 [patent_doc_number] => 04992983 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-12 [patent_title] => 'Semiconductor memory device with an improved write control circuit' [patent_app_type] => 1 [patent_app_number] => 7/540426 [patent_app_country] => US [patent_app_date] => 1990-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3519 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/992/04992983.pdf [firstpage_image] =>[orig_patent_app_number] => 540426 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/540426 		Semiconductor memory device with an improved write control circuit Jun 18, 1990 Issued
07/540254 LASER LINK DECODER FOR DRAM REDUNDANCY SCHEME Jun 18, 1990 Abandoned
07/540546 VIDEO RANDOM ACCESS MEMORY SERIAL PORT ACCESS Jun 18, 1990 Abandoned
07/536876 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE Jun 11, 1990 Abandoned
07/531011 CONTENT ADDRESSABLE MEMORY May 30, 1990 Abandoned
Array ( [id] => 2718595 [patent_doc_number] => 05056063 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-08 [patent_title] => 'Active sense amplifier with dynamic pre-charge transistor' [patent_app_type] => 1 [patent_app_number] => 7/529292 [patent_app_country] => US [patent_app_date] => 1990-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3005 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/056/05056063.pdf [firstpage_image] =>[orig_patent_app_number] => 529292 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/529292 		Active sense amplifier with dynamic pre-charge transistor May 28, 1990 Issued
Array ( [id] => 2734760 [patent_doc_number] => 05058059 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-15 [patent_title] => 'Memory circuit having a redundant memory cell array for replacing faulty cells' [patent_app_type] => 1 [patent_app_number] => 7/528986 [patent_app_country] => US [patent_app_date] => 1990-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3656 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/058/05058059.pdf [firstpage_image] =>[orig_patent_app_number] => 528986 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/528986 		Memory circuit having a redundant memory cell array for replacing faulty cells May 24, 1990 Issued
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