Search

Jessica L. Rossi

Supervisory Patent Examiner (ID: 6887, Phone: (571)272-1223 , Office: P/4100 )

Most Active Art Unit
1733
Art Unit(s)
1791, 4132, 1733, OPT
Total Applications
436
Issued Applications
256
Pending Applications
32
Abandoned Applications
148

Applications

Application numberTitle of the applicationFiling DateStatus
07/525816 MEMORY SYSTEM May 20, 1990 Abandoned
07/525286 READ/WRITE/RESTORE CIRCUIT FOR MEMORY ARRAYS May 16, 1990 Abandoned
Array ( [id] => 2889906 [patent_doc_number] => 05109360 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-28 [patent_title] => 'Row/column address interchange for a fault-tolerant memory system' [patent_app_type] => 1 [patent_app_number] => 7/530704 [patent_app_country] => US [patent_app_date] => 1990-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2268 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/109/05109360.pdf [firstpage_image] =>[orig_patent_app_number] => 530704 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/530704
Row/column address interchange for a fault-tolerant memory system May 10, 1990 Issued
07/535491 SEMICONDUCTOR MEMORY DEVICE Apr 30, 1990 Abandoned
07/516644 SEMICONDUCTOR MEMORY DEVICE WITH REDUNDANCY CIRCUIT Apr 29, 1990 Abandoned
07/514266 SEMICONDUCTOR MEMORY DEVICE HAVING SERIAL ACCESS MODE Apr 24, 1990 Abandoned
Array ( [id] => 2755156 [patent_doc_number] => 05003513 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-26 [patent_title] => 'Latching input buffer for an ATD memory' [patent_app_type] => 1 [patent_app_number] => 7/513126 [patent_app_country] => US [patent_app_date] => 1990-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3924 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/003/05003513.pdf [firstpage_image] =>[orig_patent_app_number] => 513126 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/513126
Latching input buffer for an ATD memory Apr 22, 1990 Issued
Array ( [id] => 2718956 [patent_doc_number] => 05042008 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-20 [patent_title] => 'Non-volatile semiconductor memory device having word lines (\"control gates\") embedded in substrate' [patent_app_type] => 1 [patent_app_number] => 7/509892 [patent_app_country] => US [patent_app_date] => 1990-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2911 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/042/05042008.pdf [firstpage_image] =>[orig_patent_app_number] => 509892 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/509892
Non-volatile semiconductor memory device having word lines ("control gates") embedded in substrate Apr 15, 1990 Issued
Array ( [id] => 2759904 [patent_doc_number] => 05022007 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-04 [patent_title] => 'Test signal generator for semiconductor integrated circuit memory and testing method thereof' [patent_app_type] => 1 [patent_app_number] => 7/506616 [patent_app_country] => US [patent_app_date] => 1990-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 5292 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/022/05022007.pdf [firstpage_image] =>[orig_patent_app_number] => 506616 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/506616
Test signal generator for semiconductor integrated circuit memory and testing method thereof Apr 9, 1990 Issued
Array ( [id] => 2758471 [patent_doc_number] => 05031141 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-09 [patent_title] => 'Apparatus for generating self-timing for on-chip cache' [patent_app_type] => 1 [patent_app_number] => 7/505776 [patent_app_country] => US [patent_app_date] => 1990-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6060 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/031/05031141.pdf [firstpage_image] =>[orig_patent_app_number] => 505776 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/505776
Apparatus for generating self-timing for on-chip cache Apr 5, 1990 Issued
07/503676 INFORMATION CARD Apr 2, 1990 Abandoned
Array ( [id] => 2758544 [patent_doc_number] => 05031145 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-09 [patent_title] => 'Sense amplifier' [patent_app_type] => 1 [patent_app_number] => 7/501450 [patent_app_country] => US [patent_app_date] => 1990-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1046 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/031/05031145.pdf [firstpage_image] =>[orig_patent_app_number] => 501450 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/501450
Sense amplifier Mar 28, 1990 Issued
07/500180 MEMORY CARD CIRCUIT Mar 27, 1990 Abandoned
07/499086 SEMICONDUCTOR MEMORY WITH DIVIDED BIT LOAD AND DATA BUS LINES Mar 25, 1990 Abandoned
07/497920 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE CAPABLE OF ELECTRICALLY PERFORMING READ AND WRITE OPERATION AND METHOD FOR READING INFORMATION FROM THE SAME Mar 22, 1990 Abandoned
Array ( [id] => 2810322 [patent_doc_number] => 05140551 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-18 [patent_title] => 'Non-volatile dynamic random access memory array and the method of fabricating thereof' [patent_app_type] => 1 [patent_app_number] => 7/497391 [patent_app_country] => US [patent_app_date] => 1990-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 45 [patent_no_of_words] => 7377 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/140/05140551.pdf [firstpage_image] =>[orig_patent_app_number] => 497391 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/497391
Non-volatile dynamic random access memory array and the method of fabricating thereof Mar 21, 1990 Issued
Array ( [id] => 2725393 [patent_doc_number] => 05053998 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-01 [patent_title] => 'Semiconductor memory device with dual drivers to sense amp array' [patent_app_type] => 1 [patent_app_number] => 7/493686 [patent_app_country] => US [patent_app_date] => 1990-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3004 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/053/05053998.pdf [firstpage_image] =>[orig_patent_app_number] => 493686 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/493686
Semiconductor memory device with dual drivers to sense amp array Mar 14, 1990 Issued
07/492946 SEMICONDUCTOR MEMORY Mar 12, 1990 Abandoned
07/489946 SERIAL ACCESS MEMORY DEVICE CAPABLE OF CONTROLLING ORDER OF ACCESS TO MEMORY CELL AREAS Mar 8, 1990 Abandoned
Array ( [id] => 2597340 [patent_doc_number] => 04964080 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-16 [patent_title] => 'Three-dimensional memory cell with integral select transistor' [patent_app_type] => 1 [patent_app_number] => 7/491226 [patent_app_country] => US [patent_app_date] => 1990-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4141 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/964/04964080.pdf [firstpage_image] =>[orig_patent_app_number] => 491226 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/491226
Three-dimensional memory cell with integral select transistor Mar 8, 1990 Issued
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