Search

Jessica L. Rossi

Supervisory Patent Examiner (ID: 6887, Phone: (571)272-1223 , Office: P/4100 )

Most Active Art Unit
1733
Art Unit(s)
1791, 4132, 1733, OPT
Total Applications
436
Issued Applications
256
Pending Applications
32
Abandoned Applications
148

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2449831 [patent_doc_number] => 04721987 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-01-26 [patent_title] => 'Trench capacitor process for high density dynamic RAM' [patent_app_type] => 1 [patent_app_number] => 6/627372 [patent_app_country] => US [patent_app_date] => 1984-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 1860 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/721/04721987.pdf [firstpage_image] =>[orig_patent_app_number] => 627372 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/627372
Trench capacitor process for high density dynamic RAM Jul 2, 1984 Issued
06/627725 SEMICONDUCTOR RANDOM ACCESS MEMORY ELEMENTS AND METHOD OF MANUFACTURING THE SAME Jul 2, 1984 Abandoned
06/626512 DYNAMIC RAM CELL WITH MOS TRENCH CAPACITOR IN CMOS Jun 28, 1984 Abandoned
06/626165 CONTROLLED TURN-ON THYRISTOR Jun 28, 1984 Abandoned
06/625684 SEMICONDUCTOR DEVICE HAVING A PROTECTION CIRCUIT Jun 27, 1984 Abandoned
Array ( [id] => 2421223 [patent_doc_number] => 04736233 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-04-05 [patent_title] => 'Interconnect and contact system for metal-gate MOS VLSI devices' [patent_app_type] => 1 [patent_app_number] => 6/624166 [patent_app_country] => US [patent_app_date] => 1984-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 1567 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/736/04736233.pdf [firstpage_image] =>[orig_patent_app_number] => 624166 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/624166
Interconnect and contact system for metal-gate MOS VLSI devices Jun 24, 1984 Issued
06/622125 THYRISTOR Jun 18, 1984 Abandoned
06/618433 MULTI-CHANNEL POWER JFET Jun 7, 1984 Abandoned
Array ( [id] => 2334462 [patent_doc_number] => 04635084 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-06 [patent_title] => 'Split row power JFET' [patent_app_type] => 1 [patent_app_number] => 6/618432 [patent_app_country] => US [patent_app_date] => 1984-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 6 [patent_no_of_words] => 2034 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 780 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/635/04635084.pdf [firstpage_image] =>[orig_patent_app_number] => 618432 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/618432
Split row power JFET Jun 7, 1984 Issued
Array ( [id] => 2249714 [patent_doc_number] => 04633281 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-12-30 [patent_title] => 'Dual stack power JFET with buried field shaping depletion regions' [patent_app_type] => 1 [patent_app_number] => 6/618431 [patent_app_country] => US [patent_app_date] => 1984-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2186 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 698 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/633/04633281.pdf [firstpage_image] =>[orig_patent_app_number] => 618431 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/618431
Dual stack power JFET with buried field shaping depletion regions Jun 7, 1984 Issued
Array ( [id] => 2246441 [patent_doc_number] => 04622569 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-11-11 [patent_title] => 'Lateral bidirectional power FET with notched multi-channel stacking and with dual gate reference terminal means' [patent_app_type] => 1 [patent_app_number] => 6/618537 [patent_app_country] => US [patent_app_date] => 1984-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1841 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 728 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/622/04622569.pdf [firstpage_image] =>[orig_patent_app_number] => 618537 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/618537
Lateral bidirectional power FET with notched multi-channel stacking and with dual gate reference terminal means Jun 7, 1984 Issued
Array ( [id] => 2289588 [patent_doc_number] => 04604638 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-05 [patent_title] => 'Five layer semiconductor device with separate insulated turn-on and turn-off gates' [patent_app_type] => 1 [patent_app_number] => 6/610780 [patent_app_country] => US [patent_app_date] => 1984-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 4054 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/604/04604638.pdf [firstpage_image] =>[orig_patent_app_number] => 610780 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/610780
Five layer semiconductor device with separate insulated turn-on and turn-off gates May 15, 1984 Issued
06/609860 HIGH POWER HIGH FREQUENCY SEMICONDUCTOR DEVICE WITH IMPROVED THERMAL RESISTANCE May 13, 1984 Abandoned
Array ( [id] => 2246428 [patent_doc_number] => 04622568 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-11-11 [patent_title] => 'Planar field-shaped bidirectional power FET' [patent_app_type] => 1 [patent_app_number] => 6/608402 [patent_app_country] => US [patent_app_date] => 1984-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2945 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 359 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/622/04622568.pdf [firstpage_image] =>[orig_patent_app_number] => 608402 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/608402
Planar field-shaped bidirectional power FET May 8, 1984 Issued
Array ( [id] => 2180875 [patent_doc_number] => 04558243 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-12-10 [patent_title] => 'Bidirectional power FET with shorting-channel off state' [patent_app_type] => 1 [patent_app_number] => 6/608401 [patent_app_country] => US [patent_app_date] => 1984-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4022 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/558/04558243.pdf [firstpage_image] =>[orig_patent_app_number] => 608401 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/608401
Bidirectional power FET with shorting-channel off state May 8, 1984 Issued
06/597895 ASYMMETRICAL FIELD CONTROLLED THYRISTOR Apr 8, 1984 Abandoned
06/594589 LATCH-UP RESISTANT CMOS STRUCTURE FOR VLSI Mar 28, 1984 Abandoned
06/598281 THYRISTOR AND METHOD OF MANUFACTURING THEREOF Mar 18, 1984 Abandoned
Array ( [id] => 2223252 [patent_doc_number] => 04631563 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-12-23 [patent_title] => 'Metal oxide semiconductor field-effect transistor with metal source region' [patent_app_type] => 1 [patent_app_number] => 6/585639 [patent_app_country] => US [patent_app_date] => 1984-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3880 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/631/04631563.pdf [firstpage_image] =>[orig_patent_app_number] => 585639 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/585639
Metal oxide semiconductor field-effect transistor with metal source region Mar 7, 1984 Issued
06/587350 SEMICONDUCTOR DEVICE Mar 7, 1984 Abandoned
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